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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/rtc/microchip,mfps-rtc.yaml#5 6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: Microchip PolarFire Soc (MPFS) RTC9 10allOf:11 - $ref: rtc.yaml#12 13maintainers:14 - Daire McNamara <daire.mcnamara@microchip.com>15 - Lewis Hanly <lewis.hanly@microchip.com>16 17properties:18 compatible:19 enum:20 - microchip,mpfs-rtc21 22 reg:23 maxItems: 124 25 interrupts:26 items:27 - description: |28 RTC_WAKEUP interrupt29 - description: |30 RTC_MATCH, asserted when the content of the Alarm register is equal31 to that of the RTC's count register.32 33 clocks:34 items:35 - description: |36 AHB clock37 - description: |38 Reference clock: divided by the prescaler to create a time-based39 strobe (typically 1 Hz) for the calendar counter. By default, the rtc40 on the PolarFire SoC shares it's reference with MTIMER so this will41 be a 1 MHz clock.42 43 clock-names:44 items:45 - const: rtc46 - const: rtcref47 48required:49 - compatible50 - reg51 - interrupts52 - clocks53 - clock-names54 55additionalProperties: false56 57examples:58 - |59 #include "dt-bindings/clock/microchip,mpfs-clock.h"60 rtc@20124000 {61 compatible = "microchip,mpfs-rtc";62 reg = <0x20124000 0x1000>;63 clocks = <&clkcfg CLK_RTC>, <&clkcfg CLK_RTCREF>;64 clock-names = "rtc", "rtcref";65 interrupts = <80>, <81>;66 };67...68