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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/rtc/qcom-pm8xxx-rtc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm PM8xxx PMIC RTC device8 9maintainers:10 - Satya Priya <quic_c_skakit@quicinc.com>11 12properties:13 compatible:14 oneOf:15 - enum:16 - qcom,pm8058-rtc17 - qcom,pm8921-rtc18 - qcom,pm8941-rtc19 - qcom,pmk8350-rtc20 - items:21 - enum:22 - qcom,pm8018-rtc23 - const: qcom,pm8921-rtc24 25 reg:26 minItems: 127 maxItems: 228 29 reg-names:30 minItems: 131 items:32 - const: rtc33 - const: alarm34 35 interrupts:36 maxItems: 137 38 allow-set-time:39 $ref: /schemas/types.yaml#/definitions/flag40 description:41 Indicates that the setting of RTC time is allowed by the host CPU.42 43 nvmem-cells:44 items:45 - description:46 four-byte nvmem cell holding a little-endian offset from the Unix47 epoch representing the time when the RTC timer was last reset48 49 nvmem-cell-names:50 items:51 - const: offset52 53 wakeup-source: true54 55required:56 - compatible57 - reg58 - interrupts59 60additionalProperties: false61 62examples:63 - |64 #include <dt-bindings/interrupt-controller/irq.h>65 #include <dt-bindings/spmi/spmi.h>66 67 spmi {68 #address-cells = <2>;69 #size-cells = <0>;70 71 pmic@0 {72 compatible = "qcom,pm8941", "qcom,spmi-pmic";73 reg = <0x0 SPMI_USID>;74 #address-cells = <1>;75 #size-cells = <0>;76 77 rtc@6000 {78 compatible = "qcom,pm8941-rtc";79 reg = <0x6000>, <0x6100>;80 reg-names = "rtc", "alarm";81 interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;82 nvmem-cells = <&rtc_offset>;83 nvmem-cell-names = "offset";84 };85 };86 };87...88