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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: STMicroelectronics STM32 Real Time Clock8 9maintainers:10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>11 12properties:13 compatible:14 enum:15 - st,stm32-rtc16 - st,stm32h7-rtc17 - st,stm32mp1-rtc18 - st,stm32mp25-rtc19 20 reg:21 maxItems: 122 23 clocks:24 minItems: 125 maxItems: 226 27 clock-names:28 items:29 - const: pclk30 - const: rtc_ck31 32 interrupts:33 maxItems: 134 35 st,syscfg:36 $ref: /schemas/types.yaml#/definitions/phandle-array37 items:38 minItems: 339 maxItems: 340 description: |41 Phandle/offset/mask triplet. The phandle to pwrcfg used to42 access control register at offset, and change the dbp (Disable Backup43 Protection) bit represented by the mask, mandatory to disable/enable backup44 domain (RTC registers) write protection.45 46 assigned-clocks:47 description: |48 override default rtc_ck parent clock reference to the rtc_ck clock entry49 maxItems: 150 51 assigned-clock-parents:52 description: |53 override default rtc_ck parent clock phandle of the new parent clock of rtc_ck54 maxItems: 155 56patternProperties:57 "^rtc-[a-z]+-[0-9]+$":58 type: object59 $ref: /schemas/pinctrl/pinmux-node.yaml60 description: |61 Configuration of STM32 RTC pins description. STM32 RTC is able to output62 some signals on specific pins:63 - LSCO (Low Speed Clock Output) that allow to output LSE clock on a pin.64 - Alarm out that allow to send a pulse on a pin when alarm A of the RTC65 expires.66 additionalProperties: false67 properties:68 function:69 enum:70 - lsco71 - alarm-a72 pins:73 enum:74 - out175 - out276 - out2_rmp77 78allOf:79 - if:80 properties:81 compatible:82 contains:83 const: st,stm32-rtc84 85 then:86 properties:87 clocks:88 minItems: 189 maxItems: 190 91 clock-names: false92 93 patternProperties:94 "^rtc-[a-z]+-[0-9]+$": false95 96 required:97 - st,syscfg98 99 - if:100 properties:101 compatible:102 contains:103 const: st,stm32h7-rtc104 105 then:106 properties:107 clocks:108 minItems: 2109 maxItems: 2110 111 patternProperties:112 "^rtc-[a-z]+-[0-9]+$": false113 114 required:115 - clock-names116 - st,syscfg117 118 - if:119 properties:120 compatible:121 contains:122 enum:123 - st,stm32mp1-rtc124 - st,stm32mp25-rtc125 126 then:127 properties:128 clocks:129 minItems: 2130 maxItems: 2131 132 assigned-clocks: false133 assigned-clock-parents: false134 135 required:136 - clock-names137 138required:139 - compatible140 - reg141 - clocks142 - interrupts143 144additionalProperties: false145 146examples:147 - |148 #include <dt-bindings/mfd/stm32f4-rcc.h>149 #include <dt-bindings/clock/stm32fx-clock.h>150 rtc@40002800 {151 compatible = "st,stm32-rtc";152 reg = <0x40002800 0x400>;153 clocks = <&rcc 1 CLK_RTC>;154 assigned-clocks = <&rcc 1 CLK_RTC>;155 assigned-clock-parents = <&rcc 1 CLK_LSE>;156 interrupt-parent = <&exti>;157 interrupts = <17 1>;158 st,syscfg = <&pwrcfg 0x00 0x100>;159 };160 161 - |162 #include <dt-bindings/interrupt-controller/arm-gic.h>163 #include <dt-bindings/clock/stm32mp1-clks.h>164 rtc@5c004000 {165 compatible = "st,stm32mp1-rtc";166 reg = <0x5c004000 0x400>;167 clocks = <&rcc RTCAPB>, <&rcc RTC>;168 clock-names = "pclk", "rtc_ck";169 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;170 };171 172...173