104 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/serial/renesas,scifb.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Renesas Serial Communications Interface with FIFO B (SCIFB)8 9maintainers:10 - Geert Uytterhoeven <geert+renesas@glider.be>11 12allOf:13 - $ref: serial.yaml#14 15properties:16 compatible:17 oneOf:18 - items:19 - enum:20 - renesas,scifb-r8a73a4 # R-Mobile APE621 - renesas,scifb-r8a7740 # R-Mobile A122 - renesas,scifb-sh73a0 # SH-Mobile AG523 - const: renesas,scifb # generic SCIFB compatible UART24 25 - items:26 - enum:27 - renesas,scifb-r8a7742 # RZ/G1H28 - renesas,scifb-r8a7743 # RZ/G1M29 - renesas,scifb-r8a7744 # RZ/G1N30 - renesas,scifb-r8a7745 # RZ/G1E31 - renesas,scifb-r8a7790 # R-Car H232 - renesas,scifb-r8a7791 # R-Car M2-W33 - renesas,scifb-r8a7793 # R-Car M2-N34 - renesas,scifb-r8a7794 # R-Car E235 - const: renesas,rcar-gen2-scifb # R-Car Gen2 and RZ/G136 - const: renesas,scifb # generic SCIFB compatible UART37 38 reg:39 maxItems: 140 41 interrupts:42 maxItems: 143 44 clocks:45 maxItems: 146 47 clock-names:48 enum:49 - fck # UART functional clock50 51 power-domains:52 maxItems: 153 54 resets:55 maxItems: 156 57 dmas:58 minItems: 259 maxItems: 460 description:61 Must contain a list of pairs of references to DMA specifiers, one for62 transmission, and one for reception.63 64 dma-names:65 minItems: 266 maxItems: 467 items:68 enum:69 - tx70 - rx71 72required:73 - compatible74 - reg75 - interrupts76 - clocks77 - clock-names78 - power-domains79 80if:81 properties:82 compatible:83 contains:84 enum:85 - renesas,rcar-gen2-scifb86then:87 required:88 - resets89 90unevaluatedProperties: false91 92examples:93 - |94 #include <dt-bindings/clock/r8a7740-clock.h>95 #include <dt-bindings/interrupt-controller/arm-gic.h>96 scifb: serial@e6c30000 {97 compatible = "renesas,scifb-r8a7740", "renesas,scifb";98 reg = <0xe6c30000 0x100>;99 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;100 clocks = <&mstp2_clks R8A7740_CLK_SCIFB>;101 clock-names = "fck";102 power-domains = <&pd_a3sp>;103 };104