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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/serial/samsung_uart.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller8 9maintainers:10  - Krzysztof Kozlowski <krzk@kernel.org>11  - Greg Kroah-Hartman <gregkh@linuxfoundation.org>12 13description: |+14  Each Samsung UART should have an alias correctly numbered in the "aliases"15  node, according to serialN format, where N is the port number (non-negative16  decimal integer) as specified by User's Manual of respective SoC.17 18properties:19  compatible:20    oneOf:21      - enum:22          - apple,s5l-uart23          - axis,artpec8-uart24          - google,gs101-uart25          - samsung,s3c6400-uart26          - samsung,s5pv210-uart27          - samsung,exynos4210-uart28          - samsung,exynos5433-uart29          - samsung,exynos850-uart30      - items:31          - enum:32              - samsung,exynos7-uart33              - tesla,fsd-uart34          - const: samsung,exynos4210-uart35      - items:36          - enum:37              - samsung,exynos7885-uart38          - const: samsung,exynos5433-uart39      - items:40          - enum:41              - samsung,exynosautov9-uart42              - samsung,exynosautov920-uart43          - const: samsung,exynos850-uart44 45  reg:46    maxItems: 147 48  reg-io-width:49    description: |50      The size (in bytes) of the IO accesses that should be performed51      on the device.52    enum: [ 1, 4 ]53 54  clocks:55    minItems: 256    maxItems: 557 58  clock-names:59    minItems: 260    maxItems: 561 62  dmas:63    items:64      - description: DMA controller phandle and request line for RX65      - description: DMA controller phandle and request line for TX66 67  dma-names:68    items:69      - const: rx70      - const: tx71 72  interrupts:73    description: RX interrupt and optionally TX interrupt.74    minItems: 175    maxItems: 276 77  power-domains:78    maxItems: 179 80  samsung,uart-fifosize:81    description: The fifo size supported by the UART channel.82    $ref: /schemas/types.yaml#/definitions/uint3283    enum: [16, 64, 256]84 85required:86  - compatible87  - clocks88  - clock-names89  - interrupts90  - reg91 92allOf:93  - $ref: serial.yaml#94 95  - if:96      properties:97        compatible:98          contains:99            enum:100              - samsung,s3c6400-uart101    then:102      properties:103        clocks:104          minItems: 3105          maxItems: 3106 107        clock-names:108          items:109            - const: uart110            - const: clk_uart_baud2111            - const: clk_uart_baud3112 113    else:114      properties:115        clock-names:116          minItems: 2117          items:118            - const: uart119            - const: clk_uart_baud0120            - const: clk_uart_baud1121            - const: clk_uart_baud2122            - const: clk_uart_baud3123 124  - if:125      properties:126        compatible:127          contains:128            enum:129              - samsung,s5pv210-uart130    then:131      properties:132        clocks:133          minItems: 3134          maxItems: 3135 136        clock-names:137          minItems: 3138          maxItems: 3139 140  - if:141      properties:142        compatible:143          contains:144            enum:145              - apple,s5l-uart146              - axis,artpec8-uart147              - samsung,exynos4210-uart148              - samsung,exynos5433-uart149    then:150      properties:151        clocks:152          maxItems: 2153 154        clock-names:155          maxItems: 2156 157  - if:158      properties:159        compatible:160          contains:161            enum:162              - google,gs101-uart163    then:164      required:165        - samsung,uart-fifosize166      properties:167        reg-io-width: false168 169        clocks:170          maxItems: 2171 172        clock-names:173          maxItems: 2174 175unevaluatedProperties: false176 177examples:178  - |179    #include <dt-bindings/clock/samsung,s3c64xx-clock.h>180 181    uart0: serial@7f005000 {182        compatible = "samsung,s3c6400-uart";183        reg = <0x7f005000 0x100>;184        interrupt-parent = <&vic1>;185        interrupts = <5>;186        clock-names = "uart", "clk_uart_baud2",187                      "clk_uart_baud3";188        clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,189                 <&clocks SCLK_UART>;190        samsung,uart-fifosize = <16>;191    };192  - |193    #include <dt-bindings/clock/google,gs101.h>194    #include <dt-bindings/interrupt-controller/arm-gic.h>195    #include <dt-bindings/interrupt-controller/irq.h>196 197    serial_0: serial@10a00000 {198      compatible = "google,gs101-uart";199      reg = <0x10a00000 0xc0>;200      clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,201               <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;202      clock-names = "uart", "clk_uart_baud0";203      interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;204      pinctrl-0 = <&uart0_bus>;205      pinctrl-names = "default";206      samsung,uart-fifosize = <256>;207    };208