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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NXP i.MX8MM VPU blk-ctrl8 9maintainers:10 - Lucas Stach <l.stach@pengutronix.de>11 12description:13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to14 the NoC and ensuring proper power sequencing of the VPU peripherals15 located in the VPU domain of the SoC.16 17properties:18 compatible:19 items:20 - const: fsl,imx8mm-vpu-blk-ctrl21 - const: syscon22 23 reg:24 maxItems: 125 26 '#power-domain-cells':27 const: 128 29 power-domains:30 maxItems: 431 32 power-domain-names:33 maxItems: 434 35 clocks:36 maxItems: 337 38 clock-names:39 maxItems: 340 41 interconnects:42 maxItems: 343 44 interconnect-names:45 maxItems: 346 47required:48 - compatible49 - reg50 - power-domains51 - power-domain-names52 - clocks53 - clock-names54 55allOf:56 - if:57 properties:58 compatible:59 contains:60 const: fsl,imx8mm-vpu-blk-ctrl61 then:62 properties:63 power-domains:64 items:65 - description: bus power domain66 - description: G1 decoder power domain67 - description: G2 decoder power domain68 - description: H1 encoder power domain69 70 power-domain-names:71 items:72 - const: bus73 - const: g174 - const: g275 - const: h176 77 clocks:78 items:79 - description: G1 decoder clk80 - description: G2 decoder clk81 - description: H1 encoder clk82 83 clock-names:84 items:85 - const: g186 - const: g287 - const: h188 89 interconnects:90 items:91 - description: G1 decoder interconnect92 - description: G2 decoder interconnect93 - description: H1 encoder power domain94 95 interconnect-names:96 items:97 - const: g198 - const: g299 - const: h1100 101 - if:102 properties:103 compatible:104 contains:105 const: fsl,imx8mp-vpu-blk-ctrl106 then:107 properties:108 power-domains:109 items:110 - description: bus power domain111 - description: G1 decoder power domain112 - description: G2 decoder power domain113 - description: VC8000E encoder power domain114 115 power-domain-names:116 items:117 - const: bus118 - const: g1119 - const: g2120 - const: vc8000e121 122 clocks:123 items:124 - description: G1 decoder clk125 - description: G2 decoder clk126 - description: VC8000E encoder clk127 128 clock-names:129 items:130 - const: g1131 - const: g2132 - const: vc8000e133 134 interconnects:135 items:136 - description: G1 decoder interconnect137 - description: G2 decoder interconnect138 - description: VC8000E encoder interconnect139 140 interconnect-names:141 items:142 - const: g1143 - const: g2144 - const: vc8000e145 146additionalProperties: false147 148examples:149 - |150 #include <dt-bindings/clock/imx8mm-clock.h>151 #include <dt-bindings/power/imx8mm-power.h>152 153 blk-ctrl@38330000 {154 compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon";155 reg = <0x38330000 0x100>;156 power-domains = <&pgc_vpumix>, <&pgc_vpu_g1>,157 <&pgc_vpu_g2>, <&pgc_vpu_h1>;158 power-domain-names = "bus", "g1", "g2", "h1";159 clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>,160 <&clk IMX8MM_CLK_VPU_G2_ROOT>,161 <&clk IMX8MM_CLK_VPU_H1_ROOT>;162 clock-names = "g1", "g2", "h1";163 #power-domain-cells = <1>;164 };165