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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NXP i.MX8MP HSIO blk-ctrl8 9maintainers:10 - Lucas Stach <l.stach@pengutronix.de>11 12description:13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to14 the NoC and ensuring proper power sequencing of the high-speed IO15 (USB an PCIe) peripherals located in the HSIO domain of the SoC.16 17properties:18 compatible:19 items:20 - const: fsl,imx8mp-hsio-blk-ctrl21 - const: syscon22 23 reg:24 maxItems: 125 26 '#power-domain-cells':27 const: 128 29 power-domains:30 minItems: 631 maxItems: 632 33 power-domain-names:34 items:35 - const: bus36 - const: usb37 - const: usb-phy138 - const: usb-phy239 - const: pcie40 - const: pcie-phy41 42 '#clock-cells':43 const: 044 45 clocks:46 minItems: 247 maxItems: 248 49 clock-names:50 items:51 - const: usb52 - const: pcie53 54 interconnects:55 maxItems: 456 57 interconnect-names:58 items:59 - const: noc-pcie60 - const: usb161 - const: usb262 - const: pcie63 64required:65 - compatible66 - reg67 - power-domains68 - power-domain-names69 - clocks70 - clock-names71 72additionalProperties: false73 74examples:75 - |76 #include <dt-bindings/clock/imx8mp-clock.h>77 #include <dt-bindings/power/imx8mp-power.h>78 79 blk-ctrl@32f10000 {80 compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";81 reg = <0x32f10000 0x24>;82 clocks = <&clk IMX8MP_CLK_USB_ROOT>,83 <&clk IMX8MP_CLK_PCIE_ROOT>;84 clock-names = "usb", "pcie";85 power-domains = <&pgc_hsiomix>, <&pgc_hsiomix>,86 <&pgc_usb1_phy>, <&pgc_usb2_phy>,87 <&pgc_hsiomix>, <&pgc_pcie_phy>;88 power-domain-names = "bus", "usb", "usb-phy1",89 "usb-phy2", "pcie", "pcie-phy";90 #power-domain-cells = <1>;91 #clock-cells = <0>;92 };93