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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NXP i.MX8MQ VPU blk-ctrl8 9maintainers:10 - Lucas Stach <l.stach@pengutronix.de>11 12description:13 The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to14 the NoC and ensuring proper power sequencing of the VPU peripherals15 located in the VPU domain of the SoC.16 17properties:18 compatible:19 items:20 - const: fsl,imx8mq-vpu-blk-ctrl21 22 reg:23 maxItems: 124 25 '#power-domain-cells':26 const: 127 28 power-domains:29 minItems: 330 maxItems: 331 32 power-domain-names:33 items:34 - const: bus35 - const: g136 - const: g237 38 clocks:39 minItems: 240 maxItems: 241 42 clock-names:43 items:44 - const: g145 - const: g246 47required:48 - compatible49 - reg50 - power-domains51 - power-domain-names52 - clocks53 - clock-names54 55additionalProperties: false56 57examples:58 - |59 #include <dt-bindings/clock/imx8mq-clock.h>60 #include <dt-bindings/power/imx8mq-power.h>61 62 blk-ctrl@38320000 {63 compatible = "fsl,imx8mq-vpu-blk-ctrl";64 reg = <0x38320000 0x100>;65 power-domains = <&pgc_vpu>, <&pgc_vpu>, <&pgc_vpu>;66 power-domain-names = "bus", "g1", "g2";67 clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,68 <&clk IMX8MQ_CLK_VPU_G2_ROOT>;69 clock-names = "g1", "g2";70 #power-domain-cells = <1>;71 };72