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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/soc/mediatek/mediatek,mutex.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Mediatek mutex8 9maintainers:10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>11 - Philipp Zabel <p.zabel@pengutronix.de>12 13description: |14 Mediatek mutex, namely MUTEX, is used to send the triggers signals called15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display16 data path or MDP data path.17 In some SoC, such as mt2701, MUTEX could be a hardware mutex which protects18 the shadow register.19 MUTEX device node must be siblings to the central MMSYS_CONFIG node.20 For a description of the MMSYS_CONFIG binding, see21 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml22 for details.23 24properties:25 compatible:26 enum:27 - mediatek,mt2701-disp-mutex28 - mediatek,mt2712-disp-mutex29 - mediatek,mt6795-disp-mutex30 - mediatek,mt8167-disp-mutex31 - mediatek,mt8173-disp-mutex32 - mediatek,mt8183-disp-mutex33 - mediatek,mt8186-disp-mutex34 - mediatek,mt8186-mdp3-mutex35 - mediatek,mt8188-disp-mutex36 - mediatek,mt8188-vpp-mutex37 - mediatek,mt8192-disp-mutex38 - mediatek,mt8195-disp-mutex39 - mediatek,mt8195-vpp-mutex40 - mediatek,mt8365-disp-mutex41 42 reg:43 maxItems: 144 45 interrupts:46 maxItems: 147 48 power-domains:49 description: A phandle and PM domain specifier as defined by bindings of50 the power controller specified by phandle. See51 Documentation/devicetree/bindings/power/power-domain.yaml for details.52 53 clocks:54 items:55 - description: MUTEX Clock56 57 mediatek,gce-events:58 description:59 The event id which is mapping to the specific hardware event signal60 to gce. The event id is defined in the gce header61 include/dt-bindings/gce/<chip>-gce.h of each chips.62 $ref: /schemas/types.yaml#/definitions/uint32-array63 64 mediatek,gce-client-reg:65 $ref: /schemas/types.yaml#/definitions/phandle-array66 items:67 items:68 - description: phandle of GCE69 - description: GCE subsys id70 - description: register offset71 - description: register size72 description: The register of client driver can be configured by gce with73 4 arguments defined in this property. Each GCE subsys id is mapping to74 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.75 76allOf:77 - if:78 properties:79 compatible:80 contains:81 enum:82 - mediatek,mt2701-disp-mutex83 - mediatek,mt2712-disp-mutex84 - mediatek,mt6795-disp-mutex85 - mediatek,mt8173-disp-mutex86 - mediatek,mt8186-disp-mutex87 - mediatek,mt8186-mdp3-mutex88 - mediatek,mt8192-disp-mutex89 - mediatek,mt8195-disp-mutex90 then:91 required:92 - clocks93 94 95required:96 - compatible97 - reg98 - interrupts99 - power-domains100 101additionalProperties: false102 103examples:104 - |105 #include <dt-bindings/interrupt-controller/arm-gic.h>106 #include <dt-bindings/clock/mt8173-clk.h>107 #include <dt-bindings/power/mt8173-power.h>108 #include <dt-bindings/gce/mt8173-gce.h>109 110 soc {111 #address-cells = <2>;112 #size-cells = <2>;113 114 mutex: mutex@14020000 {115 compatible = "mediatek,mt8173-disp-mutex";116 reg = <0 0x14020000 0 0x1000>;117 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_LOW>;118 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;119 clocks = <&mmsys CLK_MM_MUTEX_32K>;120 mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>,121 <CMDQ_EVENT_MUTEX1_STREAM_EOF>;122 };123 };124