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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Qualcomm Always-On Subsystem side channel8 9maintainers:10 - Bjorn Andersson <bjorn.andersson@linaro.org>11 12description:13 This binding describes the hardware component responsible for side channel14 requests to the always-on subsystem (AOSS), used for certain power management15 requests that is not handled by the standard RPMh interface. Each client in the16 SoC has its own block of message RAM and IRQ for communication with the AOSS.17 The protocol used to communicate in the message RAM is known as Qualcomm18 Messaging Protocol (QMP)19 20 The AOSS side channel exposes control over a set of resources, used to control21 a set of debug related clocks and to affect the low power state of resources22 related to the secondary subsystems.23 24properties:25 compatible:26 items:27 - enum:28 - qcom,qdu1000-aoss-qmp29 - qcom,sa8775p-aoss-qmp30 - qcom,sc7180-aoss-qmp31 - qcom,sc7280-aoss-qmp32 - qcom,sc8180x-aoss-qmp33 - qcom,sc8280xp-aoss-qmp34 - qcom,sdx75-aoss-qmp35 - qcom,sdm845-aoss-qmp36 - qcom,sm6350-aoss-qmp37 - qcom,sm8150-aoss-qmp38 - qcom,sm8250-aoss-qmp39 - qcom,sm8350-aoss-qmp40 - qcom,sm8450-aoss-qmp41 - qcom,sm8550-aoss-qmp42 - qcom,sm8650-aoss-qmp43 - qcom,x1e80100-aoss-qmp44 - const: qcom,aoss-qmp45 46 reg:47 maxItems: 148 description:49 The base address and size of the message RAM for this client's50 communication with the AOSS51 52 interrupts:53 maxItems: 154 description:55 Should specify the AOSS message IRQ for this client56 57 mboxes:58 maxItems: 159 description:60 Reference to the mailbox representing the outgoing doorbell in APCS for61 this client, as described in mailbox/mailbox.txt62 63 "#clock-cells":64 const: 065 description:66 The single clock represents the QDSS clock.67 68required:69 - compatible70 - reg71 - interrupts72 - mboxes73 - "#clock-cells"74 75additionalProperties: false76 77patternProperties:78 "^(cx|mx|ebi)$":79 type: object80 description:81 The AOSS side channel also provides the controls for three cooling devices,82 these are expressed as subnodes of the QMP node. The name of the node is83 used to identify the resource and must therefore be "cx", "mx" or "ebi".84 85 properties:86 "#cooling-cells":87 const: 288 89 required:90 - "#cooling-cells"91 92 additionalProperties: false93 94examples:95 - |96 #include <dt-bindings/interrupt-controller/arm-gic.h>97 98 aoss_qmp: qmp@c300000 {99 compatible = "qcom,sdm845-aoss-qmp", "qcom,aoss-qmp";100 reg = <0x0c300000 0x100000>;101 interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;102 mboxes = <&apss_shared 0>;103 104 #clock-cells = <0>;105 106 cx_cdev: cx {107 #cooling-cells = <2>;108 };109 110 mx_cdev: mx {111 #cooling-cells = <2>;112 };113 };114...115