65 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-perictrl.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Socionext UniPhier peripheral block controller8 9maintainers:10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>11 12description: |+13 Peripheral block implemented on Socionext UniPhier SoCs is an integrated14 component of the peripherals including UART, I2C/FI2C, and SCSSI.15 Peripheral block controller is a logic to control the component.16 17properties:18 compatible:19 items:20 - enum:21 - socionext,uniphier-ld4-perictrl22 - socionext,uniphier-pro4-perictrl23 - socionext,uniphier-pro5-perictrl24 - socionext,uniphier-pxs2-perictrl25 - socionext,uniphier-sld8-perictrl26 - socionext,uniphier-ld11-perictrl27 - socionext,uniphier-ld20-perictrl28 - socionext,uniphier-pxs3-perictrl29 - socionext,uniphier-nx1-perictrl30 - const: simple-mfd31 - const: syscon32 33 reg:34 maxItems: 135 36 clock-controller:37 $ref: /schemas/clock/socionext,uniphier-clock.yaml#38 39 reset-controller:40 $ref: /schemas/reset/socionext,uniphier-reset.yaml#41 42required:43 - compatible44 - reg45 46additionalProperties: false47 48examples:49 - |50 syscon@59820000 {51 compatible = "socionext,uniphier-ld20-perictrl",52 "simple-mfd", "syscon";53 reg = <0x59820000 0x200>;54 55 clock-controller {56 compatible = "socionext,uniphier-ld20-peri-clock";57 #clock-cells = <1>;58 };59 60 reset-controller {61 compatible = "socionext,uniphier-ld20-peri-reset";62 #reset-cells = <1>;63 };64 };65