85 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/soc/tegra/nvidia,nvec.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NVIDIA compliant embedded controller8 9maintainers:10 - Thierry Reding <thierry.reding@gmail.com>11 - Jon Hunter <jonathanh@nvidia.com>12 13properties:14 compatible:15 const: nvidia,nvec16 17 reg:18 maxItems: 119 20 interrupts:21 maxItems: 122 23 clocks:24 minItems: 125 items:26 - description: divider clock27 - description: fast clock28 29 clock-names:30 minItems: 131 items:32 - const: div-clk33 - const: fast-clk34 35 resets:36 items:37 - description: module reset38 39 reset-names:40 items:41 - const: i2c42 43 clock-frequency: true44 45 request-gpios:46 description: phandle to the GPIO used for EC request47 48 slave-addr:49 $ref: /schemas/types.yaml#/definitions/uint3250 description: I2C address of the slave controller51 52additionalProperties: false53 54required:55 - compatible56 - reg57 - interrupts58 - clocks59 - clock-names60 - resets61 - reset-names62 - clock-frequency63 - request-gpios64 - slave-addr65 66examples:67 - |68 #include <dt-bindings/clock/tegra20-car.h>69 #include <dt-bindings/gpio/tegra-gpio.h>70 #include <dt-bindings/interrupt-controller/arm-gic.h>71 72 i2c@7000c500 {73 compatible = "nvidia,nvec";74 reg = <0x7000c500 0x100>;75 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;76 clock-frequency = <80000>;77 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;78 slave-addr = <138>;79 clocks = <&tegra_car TEGRA20_CLK_I2C3>,80 <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;81 clock-names = "div-clk", "fast-clk";82 resets = <&tegra_car 67>;83 reset-names = "i2c";84 };85