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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries3%YAML 1.24---5$id: http://devicetree.org/schemas/sound/atmel,sama5d2-i2s.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: Atmel I2S controller9 10maintainers:11 - Nicolas Ferre <nicolas.ferre@microchip.com>12 - Alexandre Belloni <alexandre.belloni@bootlin.com>13 - Claudiu Beznea <claudiu.beznea@microchip.com>14 15description:16 Atmel I2S (Inter-IC Sound Controller) bus is the standard17 interface for connecting audio devices, such as audio codecs.18 19properties:20 compatible:21 const: atmel,sama5d2-i2s22 23 reg:24 maxItems: 125 26 interrupts:27 maxItems: 128 29 clocks:30 items:31 - description: Peripheral clock32 - description: Generated clock (Optional)33 - description: I2S mux clock (Optional). Set34 with gclk when Master Mode is required.35 minItems: 136 37 clock-names:38 items:39 - const: pclk40 - const: gclk41 - const: muxclk42 minItems: 143 44 dmas:45 items:46 - description: TX DMA Channel47 - description: RX DMA Channel48 49 dma-names:50 items:51 - const: tx52 - const: rx53 54required:55 - compatible56 - reg57 - interrupts58 - dmas59 - dma-names60 - clocks61 - clock-names62 63additionalProperties: false64 65examples:66 - |67 #include <dt-bindings/dma/at91.h>68 #include <dt-bindings/interrupt-controller/arm-gic.h>69 70 i2s@f8050000 {71 compatible = "atmel,sama5d2-i2s";72 reg = <0xf8050000 0x300>;73 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;74 dmas = <&dma075 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |76 AT91_XDMAC_DT_PERID(31))>,77 <&dma078 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |79 AT91_XDMAC_DT_PERID(32))>;80 dma-names = "tx", "rx";81 clocks = <&i2s0_clk>, <&i2s0_gclk>, <&i2s0muxck>;82 clock-names = "pclk", "gclk", "muxclk";83 pinctrl-names = "default";84 pinctrl-0 = <&pinctrl_i2s0_default>;85 };86