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1Dialog Semiconductor DA7218 Audio Codec bindings2 3DA7218 is an audio codec with HP detect feature.4 5======6 7Required properties:8- compatible : Should be "dlg,da7217" or "dlg,da7218"9- reg: Specifies the I2C slave address10 11- VDD-supply: VDD power supply for the device12- VDDMIC-supply: VDDMIC power supply for the device13- VDDIO-supply: VDDIO power supply for the device14  (See Documentation/devicetree/bindings/regulator/regulator.txt for further15   information relating to regulators)16 17Optional properties:18- interrupts: IRQ line info for DA7218 chip.19  (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for20   further information relating to interrupt properties)21- interrupt-names : Name associated with interrupt line. Should be "wakeup" if22  interrupt is to be used to wake system, otherwise "irq" should be used.23- wakeup-source: Flag to indicate this device can wake system (suspend/resume).24 25- clocks : phandle and clock specifier for codec MCLK.26- clock-names : Clock name string for 'clocks' attribute, should be "mclk".27 28- dlg,micbias1-lvl-millivolt : Voltage (mV) for Mic Bias 129	[<1200>, <1600>, <1800>, <2000>, <2200>, <2400>, <2600>, <2800>, <3000>]30- dlg,micbias2-lvl-millivolt : Voltage (mV) for Mic Bias 231	[<1200>, <1600>, <1800>, <2000>, <2200>, <2400>, <2600>, <2800>, <3000>]32- dlg,mic1-amp-in-sel : Mic1 input source type33	["diff", "se_p", "se_n"]34- dlg,mic2-amp-in-sel : Mic2 input source type35	["diff", "se_p", "se_n"]36- dlg,dmic1-data-sel : DMIC1 channel select based on clock edge.37	["lrise_rfall", "lfall_rrise"]38- dlg,dmic1-samplephase : When to sample audio from DMIC1.39	["on_clkedge", "between_clkedge"]40- dlg,dmic1-clkrate-hz : DMic1 clock frequency (Hz).41	[<1500000>, <3000000>]42- dlg,dmic2-data-sel : DMic2 channel select based on clock edge.43	["lrise_rfall", "lfall_rrise"]44- dlg,dmic2-samplephase : When to sample audio from DMic2.45	["on_clkedge", "between_clkedge"]46- dlg,dmic2-clkrate-hz : DMic2 clock frequency (Hz).47	[<1500000>, <3000000>]48- dlg,hp-diff-single-supply : Boolean flag, use single supply for HP49			      (DA7217 only)50 51======52 53Optional Child node - 'da7218_hpldet' (DA7218 only):54 55Optional properties:56- dlg,jack-rate-us : Time between jack detect measurements (us)57	[<5>, <10>, <20>, <40>, <80>, <160>, <320>, <640>]58- dlg,jack-debounce : Number of debounce measurements taken for jack detect59	[<0>, <2>, <3>, <4>]60- dlg,jack-threshold-pct : Threshold level for jack detection (% of VDD)61	[<84>, <88>, <92>, <96>]62- dlg,comp-inv : Boolean flag, invert comparator output63- dlg,hyst : Boolean flag, enable hysteresis64- dlg,discharge : Boolean flag, auto discharge of Mic Bias on jack removal65 66======67 68Example:69 70	codec: da7218@1a {71		compatible = "dlg,da7218";72		reg = <0x1a>;73		interrupt-parent = <&gpio6>;74		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;75		wakeup-source;76 77		VDD-supply = <&reg_audio>;78		VDDMIC-supply = <&reg_audio>;79		VDDIO-supply = <&reg_audio>;80 81		clocks = <&clks 201>;82		clock-names = "mclk";83 84		dlg,micbias1-lvl-millivolt = <2600>;85		dlg,micbias2-lvl-millivolt = <2600>;86		dlg,mic1-amp-in-sel = "diff";87		dlg,mic2-amp-in-sel = "diff";88 89		dlg,dmic1-data-sel = "lrise_rfall";90		dlg,dmic1-samplephase = "on_clkedge";91		dlg,dmic1-clkrate-hz = <3000000>;92		dlg,dmic2-data-sel = "lrise_rfall";93		dlg,dmic2-samplephase = "on_clkedge";94		dlg,dmic2-clkrate-hz = <3000000>;95 96		da7218_hpldet {97			dlg,jack-rate-us = <40>;98			dlg,jack-debounce = <2>;99			dlg,jack-threshold-pct = <84>;100			dlg,hyst;101		};102	};103