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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/sound/fsl,micfil.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NXP MICFIL Digital Audio Interface (MICFIL)8 9maintainers:10 - Shengjiu Wang <shengjiu.wang@nxp.com>11 12description: |13 The MICFIL digital interface provides a 16-bit or 24-bit audio signal14 from a PDM microphone bitstream in a configurable output sampling rate.15 16properties:17 compatible:18 oneOf:19 - items:20 - enum:21 - fsl,imx95-micfil22 - const: fsl,imx93-micfil23 24 - enum:25 - fsl,imx8mm-micfil26 - fsl,imx8mp-micfil27 - fsl,imx93-micfil28 29 reg:30 maxItems: 131 32 interrupts:33 items:34 - description: Digital Microphone interface interrupt35 - description: Digital Microphone interface error interrupt36 - description: voice activity detector event interrupt37 - description: voice activity detector error interrupt38 39 dmas:40 items:41 - description: DMA controller phandle and request line for RX42 43 dma-names:44 items:45 - const: rx46 47 clocks:48 items:49 - description: The ipg clock for register access50 - description: internal micfil clock51 - description: PLL clock source for 8kHz series52 - description: PLL clock source for 11kHz series53 - description: External clock 354 minItems: 255 56 clock-names:57 items:58 - const: ipg_clk59 - const: ipg_clk_app60 - const: pll8k61 - const: pll11k62 - const: clkext363 minItems: 264 65 "#sound-dai-cells":66 const: 067 68required:69 - compatible70 - reg71 - interrupts72 - dmas73 - dma-names74 - clocks75 - clock-names76 77additionalProperties: false78 79examples:80 - |81 #include <dt-bindings/interrupt-controller/arm-gic.h>82 #include <dt-bindings/clock/imx8mm-clock.h>83 micfil: audio-controller@30080000 {84 compatible = "fsl,imx8mm-micfil";85 reg = <0x30080000 0x10000>;86 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,87 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,88 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,89 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;90 clocks = <&clk IMX8MM_CLK_PDM_IPG>,91 <&clk IMX8MM_CLK_PDM_ROOT>;92 clock-names = "ipg_clk", "ipg_clk_app";93 dmas = <&sdma2 24 25 0>;94 dma-names = "rx";95 };96