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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/sound/fsl,mqs.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NXP Medium Quality Sound (MQS)8 9maintainers:10  - Shengjiu Wang <shengjiu.wang@nxp.com>11  - Chancel Liu <chancel.liu@nxp.com>12 13description: |14  Medium quality sound (MQS) is used to generate medium quality audio15  via a standard GPIO in the pinmux, allowing the user to connect16  stereo speakers or headphones to a power amplifier without an17  additional DAC chip.18 19properties:20  compatible:21    enum:22      - fsl,imx6sx-mqs23      - fsl,imx8qm-mqs24      - fsl,imx8qxp-mqs25      - fsl,imx93-mqs26      - fsl,imx95-aonmix-mqs27      - fsl,imx95-netcmix-mqs28 29  clocks:30    minItems: 131    maxItems: 232 33  clock-names:34    minItems: 135    maxItems: 236 37  gpr:38    $ref: /schemas/types.yaml#/definitions/phandle39    description: The phandle to the General Purpose Register (GPR) node40 41  reg:42    maxItems: 143 44  power-domains:45    maxItems: 146 47  resets:48    maxItems: 149 50required:51  - compatible52  - clocks53  - clock-names54 55allOf:56  - if:57      properties:58        compatible:59          contains:60            enum:61              - fsl,imx8qm-mqs62              - fsl,imx8qxp-mqs63    then:64      properties:65        clocks:66          items:67            - description: Master clock68            - description: Clock for register access69        clock-names:70          items:71            - const: mclk72            - const: core73      required:74        - reg75        - power-domains76    else:77      properties:78        clocks:79          items:80            - description: Master clock81        clock-names:82          items:83            - const: mclk84      required:85        - gpr86 87additionalProperties: false88 89examples:90  - |91    #include <dt-bindings/clock/imx6sx-clock.h>92    mqs0: mqs {93        compatible = "fsl,imx6sx-mqs";94        gpr = <&gpr>;95        clocks = <&clks IMX6SX_CLK_SAI1>;96        clock-names = "mclk";97    };98 99  - |100    #include <dt-bindings/firmware/imx/rsrc.h>101    mqs1: mqs@59850000 {102        compatible = "fsl,imx8qm-mqs";103        reg = <0x59850000 0x10000>;104        clocks = <&mqs0_lpcg 0>, <&mqs0_lpcg 1>;105        clock-names = "mclk", "core";106        power-domains = <&pd IMX_SC_R_MQS_0>;107    };108