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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/sound/fsl,sai.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Freescale Synchronous Audio Interface (SAI).8 9maintainers:10 - Shengjiu Wang <shengjiu.wang@nxp.com>11 12description: |13 The SAI is based on I2S module that used communicating with audio codecs,14 which provides a synchronous audio interface that supports fullduplex15 serial interfaces with frame synchronization such as I2S, AC97, TDM, and16 codec/DSP interfaces.17 18properties:19 compatible:20 oneOf:21 - items:22 - enum:23 - fsl,imx6ul-sai24 - fsl,imx7d-sai25 - const: fsl,imx6sx-sai26 27 - items:28 - enum:29 - fsl,imx8mm-sai30 - fsl,imx8mn-sai31 - fsl,imx8mp-sai32 - const: fsl,imx8mq-sai33 34 - items:35 - enum:36 - fsl,imx6sx-sai37 - fsl,imx7ulp-sai38 - fsl,imx8mq-sai39 - fsl,imx8qm-sai40 - fsl,imx8ulp-sai41 - fsl,imx93-sai42 - fsl,imx95-sai43 - fsl,vf610-sai44 45 reg:46 maxItems: 147 48 clocks:49 items:50 - description: The ipg clock for register access51 - description: master clock source 0 (obsoleted)52 - description: master clock source 153 - description: master clock source 254 - description: master clock source 355 - description: PLL clock source for 8kHz series56 - description: PLL clock source for 11kHz series57 minItems: 458 59 clock-names:60 oneOf:61 - items:62 - const: bus63 - const: mclk064 - const: mclk165 - const: mclk266 - const: mclk367 - const: pll8k68 - const: pll11k69 minItems: 570 - items:71 - const: bus72 - const: mclk173 - const: mclk274 - const: mclk375 - const: pll8k76 - const: pll11k77 minItems: 478 79 power-domains:80 maxItems: 181 82 dmas:83 minItems: 184 maxItems: 285 86 dma-names:87 minItems: 188 items:89 - enum: [ rx, tx ]90 - const: tx91 92 interrupts:93 items:94 - description: receive and transmit interrupt95 96 big-endian:97 description: |98 required if all the SAI registers are big-endian rather than little-endian.99 type: boolean100 101 fsl,dataline:102 $ref: /schemas/types.yaml#/definitions/uint32-matrix103 description: |104 Configure the dataline. It has 3 value for each configuration105 maxItems: 16106 items:107 items:108 - description: format Default(0), I2S(1) or PDM(2)109 enum: [0, 1, 2]110 - description: dataline mask for 'rx'111 - description: dataline mask for 'tx'112 113 fsl,sai-mclk-direction-output:114 description: SAI will output the SAI MCLK clock.115 type: boolean116 117 fsl,sai-synchronous-rx:118 description: |119 SAI will work in the synchronous mode (sync Tx with Rx) which means120 both the transmitter and the receiver will send and receive data by121 following receiver's bit clocks and frame sync clocks.122 type: boolean123 124 fsl,sai-asynchronous:125 description: |126 SAI will work in the asynchronous mode, which means both transmitter127 and receiver will send and receive data by following their own bit clocks128 and frame sync clocks separately.129 If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the130 default synchronous mode (sync Rx with Tx) will be used, which means both131 transmitter and receiver will send and receive data by following clocks132 of transmitter.133 type: boolean134 135 fsl,shared-interrupt:136 description: Interrupt is shared with other modules.137 type: boolean138 139 lsb-first:140 description: |141 Configures whether the LSB or the MSB is transmitted142 first for the fifo data. If this property is absent,143 the MSB is transmitted first as default, or the LSB144 is transmitted first.145 type: boolean146 147 "#sound-dai-cells":148 const: 0149 description: optional, some dts node didn't add it.150 151allOf:152 - $ref: dai-common.yaml#153 - if:154 required:155 - fsl,sai-asynchronous156 then:157 properties:158 fsl,sai-synchronous-rx: false159 160required:161 - compatible162 - reg163 - clocks164 - clock-names165 - dmas166 - dma-names167 - interrupts168 169unevaluatedProperties: false170 171examples:172 - |173 #include <dt-bindings/interrupt-controller/arm-gic.h>174 #include <dt-bindings/clock/vf610-clock.h>175 sai2: sai@40031000 {176 compatible = "fsl,vf610-sai";177 reg = <0x40031000 0x1000>;178 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;179 pinctrl-names = "default";180 pinctrl-0 = <&pinctrl_sai2_1>;181 clocks = <&clks VF610_CLK_PLATFORM_BUS>,182 <&clks VF610_CLK_SAI2>,183 <&clks 0>, <&clks 0>;184 clock-names = "bus", "mclk1", "mclk2", "mclk3";185 dma-names = "rx", "tx";186 dmas = <&edma0 0 20>, <&edma0 0 21>;187 big-endian;188 lsb-first;189 };190 191 - |192 #include <dt-bindings/interrupt-controller/arm-gic.h>193 #include <dt-bindings/clock/imx8mm-clock.h>194 sai1: sai@30010000 {195 compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";196 reg = <0x30010000 0x10000>;197 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;198 clocks = <&clk IMX8MM_CLK_SAI1_IPG>,199 <&clk IMX8MM_CLK_DUMMY>,200 <&clk IMX8MM_CLK_SAI1_ROOT>,201 <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;202 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";203 dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;204 dma-names = "rx", "tx";205 fsl,dataline = <1 0xff 0xff 2 0xff 0x11>;206 #sound-dai-cells = <0>;207 };208