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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Audio Graph based Tegra sound card driver8 9description: |10 This is based on generic audio graph card driver along with additional11 customizations for Tegra platforms. It uses the same bindings with12 additional standard clock DT bindings required for Tegra.13 14maintainers:15 - Jon Hunter <jonathanh@nvidia.com>16 - Sameer Pujar <spujar@nvidia.com>17 18allOf:19 - $ref: audio-graph.yaml#20 21properties:22 compatible:23 enum:24 - nvidia,tegra210-audio-graph-card25 - nvidia,tegra186-audio-graph-card26 27 clocks:28 minItems: 229 30 clock-names:31 items:32 - const: pll_a33 - const: plla_out034 35 assigned-clocks:36 minItems: 137 maxItems: 338 39 assigned-clock-parents:40 minItems: 141 maxItems: 342 43 assigned-clock-rates:44 minItems: 145 maxItems: 346 47 interconnects:48 items:49 - description: APE read memory client50 - description: APE write memory client51 52 interconnect-names:53 items:54 - const: dma-mem # read55 - const: write56 57 iommus:58 maxItems: 159 60required:61 - clocks62 - clock-names63 - assigned-clocks64 - assigned-clock-parents65 66unevaluatedProperties: false67 68examples:69 - |70 #include<dt-bindings/clock/tegra210-car.h>71 72 tegra_sound {73 compatible = "nvidia,tegra210-audio-graph-card";74 75 clocks = <&tegra_car TEGRA210_CLK_PLL_A>,76 <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;77 clock-names = "pll_a", "plla_out0";78 79 assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,80 <&tegra_car TEGRA210_CLK_PLL_A_OUT0>,81 <&tegra_car TEGRA210_CLK_EXTERN1>;82 assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;83 assigned-clock-rates = <368640000>, <49152000>, <12288000>;84 85 dais = /* FE */86 <&admaif1_port>,87 /* Router */88 <&xbar_i2s1_port>,89 /* I/O DAP Ports */90 <&i2s1_port>;91 92 label = "jetson-tx1-ape";93 };94 95 // The ports are defined for AHUB and its child devices.96 ahub@702d0800 {97 compatible = "nvidia,tegra210-ahub";98 reg = <0x702d0800 0x800>;99 clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;100 clock-names = "ahub";101 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;102 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;103 #address-cells = <1>;104 #size-cells = <1>;105 ranges = <0x702d0000 0x702d0000 0x0000e400>;106 107 ports {108 #address-cells = <1>;109 #size-cells = <0>;110 111 port@0 {112 reg = <0x0>;113 xbar_admaif1_ep: endpoint {114 remote-endpoint = <&admaif1_ep>;115 };116 };117 118 // ...119 120 xbar_i2s1_port: port@a {121 reg = <0xa>;122 xbar_i2s1_ep: endpoint {123 remote-endpoint = <&i2s1_cif_ep>;124 };125 };126 };127 128 admaif@702d0000 {129 compatible = "nvidia,tegra210-admaif";130 reg = <0x702d0000 0x800>;131 dmas = <&adma 1>, <&adma 1>,132 <&adma 2>, <&adma 2>,133 <&adma 3>, <&adma 3>,134 <&adma 4>, <&adma 4>,135 <&adma 5>, <&adma 5>,136 <&adma 6>, <&adma 6>,137 <&adma 7>, <&adma 7>,138 <&adma 8>, <&adma 8>,139 <&adma 9>, <&adma 9>,140 <&adma 10>, <&adma 10>;141 dma-names = "rx1", "tx1",142 "rx2", "tx2",143 "rx3", "tx3",144 "rx4", "tx4",145 "rx5", "tx5",146 "rx6", "tx6",147 "rx7", "tx7",148 "rx8", "tx8",149 "rx9", "tx9",150 "rx10", "tx10";151 152 ports {153 #address-cells = <1>;154 #size-cells = <0>;155 156 admaif1_port: port@0 {157 reg = <0x0>;158 admaif1_ep: endpoint {159 remote-endpoint = <&xbar_admaif1_ep>;160 };161 };162 163 // More ADMAIF ports to follow164 };165 };166 167 i2s@702d1000 {168 compatible = "nvidia,tegra210-i2s";169 clocks = <&tegra_car TEGRA210_CLK_I2S0>;170 clock-names = "i2s";171 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;172 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;173 assigned-clock-rates = <1536000>;174 reg = <0x702d1000 0x100>;175 176 ports {177 #address-cells = <1>;178 #size-cells = <0>;179 180 port@0 {181 reg = <0x0>;182 183 i2s1_cif_ep: endpoint {184 remote-endpoint = <&xbar_i2s1_ep>;185 };186 };187 188 i2s1_port: port@1 {189 reg = <0x1>;190 191 i2s1_dap: endpoint {192 dai-format = "i2s";193 };194 };195 };196 };197 };198 199...200