83 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/sound/nvidia,tegra20-ac97.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: NVIDIA Tegra20 AC97 controller8 9maintainers:10 - Thierry Reding <treding@nvidia.com>11 - Jon Hunter <jonathanh@nvidia.com>12 13properties:14 compatible:15 const: nvidia,tegra20-ac9716 17 reg:18 maxItems: 119 20 resets:21 maxItems: 122 23 reset-names:24 const: ac9725 26 interrupts:27 maxItems: 128 29 clocks:30 maxItems: 131 32 dmas:33 maxItems: 234 35 dma-names:36 items:37 - const: rx38 - const: tx39 40 nvidia,codec-reset-gpios:41 description: Reset pin of external AC97 codec42 maxItems: 143 44 nvidia,codec-sync-gpios:45 description: AC97 DAP _FS line46 maxItems: 147 48required:49 - compatible50 - reg51 - resets52 - reset-names53 - interrupts54 - clocks55 - dmas56 - dma-names57 - nvidia,codec-reset-gpios58 - nvidia,codec-sync-gpios59 60additionalProperties: false61 62examples:63 - |64 #include <dt-bindings/clock/tegra20-car.h>65 #include <dt-bindings/gpio/tegra-gpio.h>66 #include <dt-bindings/interrupt-controller/arm-gic.h>67 #include <dt-bindings/interrupt-controller/irq.h>68 #include <dt-bindings/gpio/gpio.h>69 70 ac97@70002000 {71 compatible = "nvidia,tegra20-ac97";72 reg = <0x70002000 0x200>;73 resets = <&tegra_car 3>;74 reset-names = "ac97";75 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;76 clocks = <&tegra_car 3>;77 dmas = <&apbdma 12>, <&apbdma 12>;78 dma-names = "rx", "tx";79 nvidia,codec-reset-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;80 nvidia,codec-sync-gpios = <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;81 };82...83