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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2# Copyright (C) 2020 Texas Instruments Incorporated3# Author: Peter Ujfalusi <peter.ujfalusi@ti.com>4%YAML 1.25---6$id: http://devicetree.org/schemas/sound/ti,j721e-cpb-audio.yaml#7$schema: http://devicetree.org/meta-schemas/core.yaml#8 9title: Texas Instruments J721e Common Processor Board Audio Support10 11maintainers:12 - Peter Ujfalusi <peter.ujfalusi@gmail.com>13 14description: |15 The audio support on the board is using pcm3168a codec connected to McASP1016 serializers in parallel setup.17 The pcm3168a SCKI clock is sourced from j721e AUDIO_REFCLK2 pin.18 In order to support 48KHz and 44.1KHz family of sampling rates the parent19 clock for AUDIO_REFCLK2 needs to be changed between PLL4 (for 48KHz) and20 PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via21 different HSDIVIDER.22 23 Clocking setup for j721e:24 48KHz family:25 PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk26 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI27 28 44.1KHz family:29 PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk30 |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI31 32 Clocking setup for j7200:33 48KHz family:34 PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk35 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI36 37properties:38 compatible:39 enum:40 - ti,j721e-cpb-audio41 - ti,j7200-cpb-audio42 43 model:44 $ref: /schemas/types.yaml#/definitions/string45 description: User specified audio sound card name46 47 ti,cpb-mcasp:48 description: phandle to McASP used on CPB49 $ref: /schemas/types.yaml#/definitions/phandle50 51 ti,cpb-codec:52 description: phandle to the pcm3168a codec used on the CPB53 $ref: /schemas/types.yaml#/definitions/phandle54 55 clocks:56 minItems: 457 maxItems: 658 59 clock-names:60 minItems: 461 maxItems: 662 63required:64 - compatible65 - model66 - ti,cpb-mcasp67 - ti,cpb-codec68 - clocks69 - clock-names70 71additionalProperties: false72 73allOf:74 - if:75 properties:76 compatible:77 contains:78 const: ti,j721e-cpb-audio79 80 then:81 properties:82 clocks:83 items:84 - description: AUXCLK clock for McASP used by CPB audio85 - description: Parent for CPB_McASP auxclk (for 48KHz)86 - description: Parent for CPB_McASP auxclk (for 44.1KHz)87 - description: SCKI clock for the pcm3168a codec on CPB88 - description: Parent for CPB_SCKI clock (for 48KHz)89 - description: Parent for CPB_SCKI clock (for 44.1KHz)90 91 clock-names:92 items:93 - const: cpb-mcasp-auxclk94 - const: cpb-mcasp-auxclk-4800095 - const: cpb-mcasp-auxclk-4410096 - const: cpb-codec-scki97 - const: cpb-codec-scki-4800098 - const: cpb-codec-scki-4410099 100 - if:101 properties:102 compatible:103 contains:104 const: ti,j7200-cpb-audio105 106 then:107 properties:108 clocks:109 items:110 - description: AUXCLK clock for McASP used by CPB audio111 - description: Parent for CPB_McASP auxclk (for 48KHz)112 - description: SCKI clock for the pcm3168a codec on CPB113 - description: Parent for CPB_SCKI clock (for 48KHz)114 115 clock-names:116 items:117 - const: cpb-mcasp-auxclk118 - const: cpb-mcasp-auxclk-48000119 - const: cpb-codec-scki120 - const: cpb-codec-scki-48000121 122examples:123 - |+124 sound {125 compatible = "ti,j721e-cpb-audio";126 model = "j721e-cpb";127 128 ti,cpb-mcasp = <&mcasp10>;129 ti,cpb-codec = <&pcm3168a_1>;130 131 clocks = <&k3_clks 184 1>,132 <&k3_clks 184 2>, <&k3_clks 184 4>,133 <&k3_clks 157 371>,134 <&k3_clks 157 400>, <&k3_clks 157 401>;135 clock-names = "cpb-mcasp-auxclk",136 "cpb-mcasp-auxclk-48000", "cpb-mcasp-auxclk-44100",137 "cpb-codec-scki",138 "cpb-codec-scki-48000", "cpb-codec-scki-44100";139 };140