brintos

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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/sound/wlf,wm8960.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Wolfson WM8960 audio codec8 9maintainers:10  - patches@opensource.cirrus.com11 12properties:13  compatible:14    const: wlf,wm896015 16  reg:17    maxItems: 118 19  clocks:20    maxItems: 121 22  clock-names:23    items:24      - const: mclk25 26  '#sound-dai-cells':27    const: 028 29  AVDD-supply:30    description: Analogue supply.31 32  DBVDD-supply:33    description: Digital Buffer Supply.34 35  DCVDD-supply:36    description: Digital Core Supply.37 38  SPKVDD1-supply:39    description: Supply for speaker drivers 1.40 41  SPKVDD2-supply:42    description: Supply for speaker drivers 2.43 44  wlf,capless:45    type: boolean46    description:47      If present, OUT3 pin will be enabled and disabled together with HP_L and48      HP_R pins in response to jack detect events.49 50  wlf,gpio-cfg:51    $ref: /schemas/types.yaml#/definitions/uint32-array52    maxItems: 253    description: |54      A list of GPIO configuration register values.55       - gpio-cfg[0]: ALRCGPIO of R9 (Audio interface)56       - gpio-cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4).57 58  wlf,hp-cfg:59    $ref: /schemas/types.yaml#/definitions/uint32-array60    maxItems: 361    description: |62      A list of headphone jack detect configuration register values:63       - hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4).64       - hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2).65       - hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1).66 67  wlf,shared-lrclk:68    type: boolean69    description:70      If present, the LRCM bit of R24 (Additional control 2) gets set,71      indicating that ADCLRC and DACLRC pins will be disabled only when ADC72      (Left and Right) and DAC (Left and Right) are disabled.73      When WM8960 works on synchronize mode and DACLRC pin is used to supply74      frame clock, it will no frame clock for captrue unless enable DAC to75      enable DACLRC pin. If shared-lrclk is present, no need to enable DAC for76      captrue.77 78required:79  - compatible80  - reg81 82allOf:83  - $ref: dai-common.yaml#84 85unevaluatedProperties: false86 87examples:88  - |89    i2c {90        #address-cells = <1>;91        #size-cells = <0>;92 93        audio-codec@1a {94            compatible = "wlf,wm8960";95            reg = <0x1a>;96            clocks = <&clks 0>;97            clock-names = "mclk";98            #sound-dai-cells = <0>;99            wlf,hp-cfg = <3 2 3>;100            wlf,gpio-cfg = <1 3>;101            wlf,shared-lrclk;102            DCVDD-supply = <&reg_audio>;103            DBVDD-supply = <&reg_audio>;104            AVDD-supply = <&reg_audio>;105            SPKVDD1-supply = <&reg_audio>;106            SPKVDD2-supply = <&reg_audio>;107        };108    };109