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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/sound/wlf,wm8962.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Wolfson WM8962 Ultra-Low Power Stereo CODEC8 9maintainers:10 - patches@opensource.cirrus.com11 12allOf:13 - $ref: dai-common.yaml#14 15properties:16 compatible:17 const: wlf,wm896218 19 reg:20 maxItems: 121 22 clocks:23 maxItems: 124 25 interrupts:26 maxItems: 127 28 "#sound-dai-cells":29 const: 030 31 AVDD-supply:32 description: Analogue supply.33 34 CPVDD-supply:35 description: Charge pump power supply.36 37 DBVDD-supply:38 description: Digital Buffer Supply.39 40 DCVDD-supply:41 description: Digital Core Supply.42 43 MICVDD-supply:44 description: Microphone bias amp supply.45 46 PLLVDD-supply:47 description: PLL Supply48 49 SPKVDD1-supply:50 description: Supply for left speaker drivers.51 52 SPKVDD2-supply:53 description: Supply for right speaker drivers.54 55 spk-mono:56 $ref: /schemas/types.yaml#/definitions/flag57 description:58 If present, the SPK_MONO bit of R51 (Class D Control 2) gets set,59 indicating that the speaker is in mono mode.60 61 mic-cfg:62 $ref: /schemas/types.yaml#/definitions/uint3263 description:64 Default register value for R48 (Additional Control 4).65 If absent, the default should be the register default.66 67 gpio-cfg:68 $ref: /schemas/types.yaml#/definitions/uint32-array69 minItems: 670 maxItems: 671 description:72 A list of GPIO configuration register values. If absent, no73 configuration of these registers is performed. Note that only values74 within [0x0, 0xffff] are valid. Any other value is regarded as setting75 the GPIO register to its reset value 0x0.76 77 port:78 $ref: audio-graph-port.yaml#79 unevaluatedProperties: false80 81required:82 - compatible83 - reg84 - AVDD-supply85 - CPVDD-supply86 - DBVDD-supply87 - DCVDD-supply88 - MICVDD-supply89 - PLLVDD-supply90 - SPKVDD1-supply91 - SPKVDD2-supply92 93unevaluatedProperties: false94 95examples:96 - |97 #include <dt-bindings/clock/imx6qdl-clock.h>98 99 i2c {100 #address-cells = <1>;101 #size-cells = <0>;102 103 wm8962: codec@1a {104 compatible = "wlf,wm8962";105 reg = <0x1a>;106 clocks = <&clks IMX6QDL_CLK_CKO>;107 DCVDD-supply = <®_audio>;108 DBVDD-supply = <®_audio>;109 AVDD-supply = <®_audio>;110 CPVDD-supply = <®_audio>;111 MICVDD-supply = <®_audio>;112 PLLVDD-supply = <®_audio>;113 SPKVDD1-supply = <®_audio>;114 SPKVDD2-supply = <®_audio>;115 gpio-cfg = <116 0x0000 /* 0:Default */117 0x0000 /* 1:Default */118 0x0013 /* 2:FN_DMICCLK */119 0x0000 /* 3:Default */120 0x8014 /* 4:FN_DMICCDAT */121 0x0000 /* 5:Default */122 >;123 };124 };125