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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/sound/wlf,wm8994.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Wolfson WM1811/WM8994/WM8958 audio codecs8 9maintainers:10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>11 - patches@opensource.cirrus.com12 13description: |14 These devices support both I2C and SPI (configured with pin strapping on the15 board).16 17 Pins on the device (for linking into audio routes):18 IN1LN, IN1LP, IN2LN, IN2LP:VXRN, IN1RN, IN1RP, IN2RN, IN2RP:VXRP, SPKOUTLP,19 SPKOUTLN, SPKOUTRP, SPKOUTRN, HPOUT1L, HPOUT1R, HPOUT2P, HPOUT2N, LINEOUT1P,20 LINEOUT1N, LINEOUT2P, LINEOUT2N.21 22properties:23 compatible:24 enum:25 - wlf,wm181126 - wlf,wm899427 - wlf,wm895828 29 reg:30 maxItems: 131 32 clocks:33 minItems: 134 maxItems: 235 36 clock-names:37 minItems: 138 items:39 - const: MCLK140 - const: MCLK241 42 gpio-controller: true43 44 '#gpio-cells':45 const: 246 47 interrupts:48 maxItems: 149 50 interrupt-controller: true51 52 '#interrupt-cells':53 const: 254 description:55 The first cell is the IRQ number. The second cell is the flags, encoded56 as the trigger masks.57 58 AVDD1-supply: true59 AVDD2-supply: true60 CPVDD-supply: true61 DBVDD-supply: true62 DBVDD1-supply: true63 DBVDD2-supply: true64 DBVDD3-supply: true65 DCVDD-supply: true66 LDO1VDD-supply: true67 LDO2VDD-supply: true68 SPKVDD1-supply: true69 SPKVDD2-supply: true70 71 '#sound-dai-cells':72 const: 073 74 wlf,gpio-cfg:75 $ref: /schemas/types.yaml#/definitions/uint32-array76 maxItems: 1177 description:78 A list of GPIO configuration register values. If absent, no configuration79 of these registers is performed. If any value is over 0xffff then the80 register will be left as default. If present 11 values must be supplied.81 82 wlf,micbias-cfg:83 $ref: /schemas/types.yaml#/definitions/uint32-array84 maxItems: 285 description:86 Two MICBIAS register values for WM1811 or WM8958. If absent the register87 defaults will be used.88 89 wlf,ldo1ena-gpios:90 maxItems: 191 description:92 Control of LDO1ENA input to device.93 94 wlf,ldo2ena-gpios:95 maxItems: 196 description:97 Control of LDO2ENA input to device.98 99 wlf,lineout1-se:100 type: boolean101 description:102 LINEOUT1 is in single ended mode.103 104 wlf,lineout2-se:105 type: boolean106 description:107 INEOUT2 is in single ended mode.108 109 wlf,lineout1-feedback:110 type: boolean111 description:112 LINEOUT1 has common mode feedback connected.113 114 wlf,lineout2-feedback:115 type: boolean116 description:117 LINEOUT2 has common mode feedback connected.118 119 wlf,ldoena-always-driven:120 type: boolean121 description:122 LDOENA is always driven.123 124 wlf,spkmode-pu:125 type: boolean126 description:127 Enable the internal pull-up resistor on the SPKMODE pin.128 129 wlf,csnaddr-pd:130 type: boolean131 description:132 Enable the internal pull-down resistor on the CS/ADDR pin.133 134required:135 - compatible136 - reg137 - AVDD2-supply138 - CPVDD-supply139 - SPKVDD1-supply140 - SPKVDD2-supply141 142allOf:143 - $ref: dai-common.yaml#144 - if:145 properties:146 compatible:147 enum:148 - wlf,wm1811149 - wlf,wm8958150 then:151 properties:152 DBVDD-supply: false153 LDO2VDD-supply: false154 required:155 - DBVDD1-supply156 - DBVDD2-supply157 - DBVDD3-supply158 else:159 properties:160 DBVDD1-supply: false161 DBVDD2-supply: false162 DBVDD3-supply: false163 required:164 - DBVDD-supply165 166unevaluatedProperties: false167 168examples:169 - |170 #include <dt-bindings/gpio/gpio.h>171 172 i2c {173 #address-cells = <1>;174 #size-cells = <0>;175 176 audio-codec@1a {177 compatible = "wlf,wm1811";178 reg = <0x1a>;179 clocks = <&i2s0 0>;180 clock-names = "MCLK1";181 182 AVDD2-supply = <&main_dc_reg>;183 CPVDD-supply = <&main_dc_reg>;184 DBVDD1-supply = <&main_dc_reg>;185 DBVDD2-supply = <&main_dc_reg>;186 DBVDD3-supply = <&main_dc_reg>;187 LDO1VDD-supply = <&main_dc_reg>;188 SPKVDD1-supply = <&main_dc_reg>;189 SPKVDD2-supply = <&main_dc_reg>;190 191 wlf,ldo1ena-gpios = <&gpb0 0 GPIO_ACTIVE_HIGH>;192 wlf,ldo2ena-gpios = <&gpb0 1 GPIO_ACTIVE_HIGH>;193 };194 };195