83 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Aspeed SMC controllers8 9maintainers:10 - Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>11 - Cédric Le Goater <clg@kaod.org>12 13description: |14 This binding describes the Aspeed Static Memory Controllers (FMC and15 SPI) of the AST2400, AST2500 and AST2600 SOCs.16 17allOf:18 - $ref: spi-controller.yaml#19 20properties:21 compatible:22 enum:23 - aspeed,ast2600-fmc24 - aspeed,ast2600-spi25 - aspeed,ast2500-fmc26 - aspeed,ast2500-spi27 - aspeed,ast2400-fmc28 - aspeed,ast2400-spi29 30 reg:31 items:32 - description: registers33 - description: memory mapping34 35 clocks:36 maxItems: 137 38 interrupts:39 maxItems: 140 41required:42 - compatible43 - reg44 - clocks45 46unevaluatedProperties: false47 48examples:49 - |50 #include <dt-bindings/interrupt-controller/arm-gic.h>51 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>52 #include <dt-bindings/clock/ast2600-clock.h>53 54 spi@1e620000 {55 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;56 #address-cells = <1>;57 #size-cells = <0>;58 compatible = "aspeed,ast2600-fmc";59 clocks = <&syscon ASPEED_CLK_AHB>;60 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;61 62 flash@0 {63 reg = < 0 >;64 compatible = "jedec,spi-nor";65 spi-max-frequency = <50000000>;66 spi-rx-bus-width = <2>;67 };68 69 flash@1 {70 reg = < 1 >;71 compatible = "jedec,spi-nor";72 spi-max-frequency = <50000000>;73 spi-rx-bus-width = <2>;74 };75 76 flash@2 {77 reg = < 2 >;78 compatible = "jedec,spi-nor";79 spi-max-frequency = <50000000>;80 spi-rx-bus-width = <2>;81 };82 };83