177 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/spi/cdns,qspi-nor.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Cadence Quad SPI controller8 9maintainers:10 - Vaishnav Achath <vaishnav.a@ti.com>11 12allOf:13 - $ref: spi-controller.yaml#14 - if:15 properties:16 compatible:17 contains:18 const: xlnx,versal-ospi-1.019 then:20 required:21 - power-domains22 - if:23 properties:24 compatible:25 contains:26 const: starfive,jh7110-qspi27 then:28 properties:29 resets:30 minItems: 231 maxItems: 332 33 reset-names:34 minItems: 235 maxItems: 336 items:37 enum: [ qspi, qspi-ocp, rstc_ref ]38 39 else:40 properties:41 resets:42 maxItems: 243 44 reset-names:45 minItems: 146 maxItems: 247 items:48 enum: [ qspi, qspi-ocp ]49 - if:50 properties:51 compatible:52 contains:53 const: amd,pensando-elba-qspi54 then:55 properties:56 cdns,fifo-depth:57 enum: [ 128, 256, 1024 ]58 default: 102459 else:60 properties:61 cdns,fifo-depth:62 enum: [ 128, 256 ]63 default: 12864 65properties:66 compatible:67 oneOf:68 - items:69 - enum:70 - amd,pensando-elba-qspi71 - intel,lgm-qspi72 - intel,socfpga-qspi73 - mobileye,eyeq5-ospi74 - starfive,jh7110-qspi75 - ti,am654-ospi76 - ti,k2g-qspi77 - xlnx,versal-ospi-1.078 - const: cdns,qspi-nor79 - const: cdns,qspi-nor80 81 reg:82 items:83 - description: the controller register set84 - description: the controller data area85 86 interrupts:87 maxItems: 188 89 clocks:90 minItems: 191 maxItems: 392 93 clock-names:94 oneOf:95 - items:96 - const: ref97 - items:98 - const: ref99 - const: ahb100 - const: apb101 102 cdns,fifo-depth:103 description:104 Size of the data FIFO in words.105 $ref: /schemas/types.yaml#/definitions/uint32106 107 cdns,fifo-width:108 $ref: /schemas/types.yaml#/definitions/uint32109 description:110 Bus width of the data FIFO in bytes.111 default: 4112 113 cdns,trigger-address:114 $ref: /schemas/types.yaml#/definitions/uint32115 description:116 32-bit indirect AHB trigger address.117 118 cdns,is-decoded-cs:119 type: boolean120 description:121 Flag to indicate whether decoder is used to select different chip select122 for different memory regions.123 124 cdns,rclk-en:125 type: boolean126 description:127 Flag to indicate that QSPI return clock is used to latch the read128 data rather than the QSPI clock. Make sure that QSPI return clock129 is populated on the board before using this property.130 131 power-domains:132 maxItems: 1133 134 resets:135 minItems: 2136 maxItems: 3137 138 reset-names:139 minItems: 2140 maxItems: 3141 items:142 enum: [ qspi, qspi-ocp, rstc_ref ]143 144required:145 - compatible146 - reg147 - interrupts148 - clocks149 - cdns,fifo-width150 - cdns,trigger-address151 - '#address-cells'152 - '#size-cells'153 154unevaluatedProperties: false155 156examples:157 - |158 qspi: spi@ff705000 {159 compatible = "cdns,qspi-nor";160 #address-cells = <1>;161 #size-cells = <0>;162 reg = <0xff705000 0x1000>,163 <0xffa00000 0x1000>;164 interrupts = <0 151 4>;165 clocks = <&qspi_clk>;166 cdns,fifo-depth = <128>;167 cdns,fifo-width = <4>;168 cdns,trigger-address = <0x00000000>;169 resets = <&rst 0x1>, <&rst 0x2>;170 reset-names = "qspi", "qspi-ocp";171 172 flash@0 {173 compatible = "jedec,spi-nor";174 reg = <0x0>;175 };176 };177