125 lines · yaml
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: SPI-NAND flash controller for MediaTek ARM SoCs8 9maintainers:10 - Chuanhong Guo <gch981213@gmail.com>11 12description: |13 The Mediatek SPI-NAND flash controller is an extended version of14 the Mediatek NAND flash controller. It can perform standard SPI15 instructions with one continuous write and one read for up-to 0xa016 bytes. It also supports typical SPI-NAND page cache operations17 in single, dual or quad IO mode with pipelined ECC encoding/decoding18 using the accompanying ECC engine. There should be only one spi19 slave device following generic spi bindings.20 21properties:22 compatible:23 enum:24 - mediatek,mt7622-snand25 - mediatek,mt7629-snand26 - mediatek,mt7986-snand27 28 reg:29 items:30 - description: core registers31 32 interrupts:33 items:34 - description: NFI interrupt35 36 clocks:37 minItems: 238 maxItems: 339 40 clock-names:41 minItems: 242 maxItems: 343 44 nand-ecc-engine:45 description: device-tree node of the accompanying ECC engine.46 $ref: /schemas/types.yaml#/definitions/phandle47 48 mediatek,rx-latch-latency-ns:49 description: Data read latch latency, unit is nanoseconds.50 51required:52 - compatible53 - reg54 - interrupts55 - clocks56 - clock-names57 - nand-ecc-engine58 59allOf:60 - $ref: /schemas/spi/spi-controller.yaml#61 - if:62 properties:63 compatible:64 enum:65 - mediatek,mt7622-snand66 - mediatek,mt7629-snand67 then:68 properties:69 clocks:70 items:71 - description: clock used for the controller72 - description: clock used for the SPI bus73 clock-names:74 items:75 - const: nfi_clk76 - const: pad_clk77 78 - if:79 properties:80 compatible:81 enum:82 - mediatek,mt7986-snand83 then:84 properties:85 clocks:86 items:87 - description: clock used for the controller88 - description: clock used for the SPI bus89 - description: clock used for the AHB bus90 clock-names:91 items:92 - const: nfi_clk93 - const: pad_clk94 - const: nfi_hclk95 96unevaluatedProperties: false97 98examples:99 - |100 #include <dt-bindings/interrupt-controller/irq.h>101 #include <dt-bindings/interrupt-controller/arm-gic.h>102 #include <dt-bindings/clock/mt7622-clk.h>103 soc {104 #address-cells = <2>;105 #size-cells = <2>;106 snfi: spi@1100d000 {107 compatible = "mediatek,mt7622-snand";108 reg = <0 0x1100d000 0 0x1000>;109 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;110 clocks = <&pericfg CLK_PERI_NFI_PD>, <&pericfg CLK_PERI_SNFI_PD>;111 clock-names = "nfi_clk", "pad_clk";112 nand-ecc-engine = <&bch>;113 #address-cells = <1>;114 #size-cells = <0>;115 116 flash@0 {117 compatible = "spi-nand";118 reg = <0>;119 spi-tx-bus-width = <4>;120 spi-rx-bus-width = <4>;121 nand-ecc-engine = <&snfi>;122 };123 };124 };125