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1Nuvoton NPCM Peripheral Serial Peripheral Interface(PSPI) controller driver2 3Nuvoton NPCM7xx SOC support two PSPI channels.4 5Required properties:6 - compatible : "nuvoton,npcm750-pspi" for Poleg NPCM7XX.7 "nuvoton,npcm845-pspi" for Arbel NPCM8XX.8 - #address-cells : should be 1. see spi-bus.txt9 - #size-cells : should be 0. see spi-bus.txt10 - specifies physical base address and size of the register.11 - interrupts : contain PSPI interrupt.12 - clocks : phandle of PSPI reference clock.13 - clock-names: Should be "clk_apb5".14 - pinctrl-names : a pinctrl state named "default" must be defined.15 - pinctrl-0 : phandle referencing pin configuration of the device.16 - resets : phandle to the reset control for this device.17 - cs-gpios: Specifies the gpio pins to be used for chipselects.18 See: Documentation/devicetree/bindings/spi/spi-bus.txt19 20Optional properties:21- clock-frequency : Input clock frequency to the PSPI block in Hz.22 Default is 25000000 Hz.23 24spi0: spi@f0200000 {25 compatible = "nuvoton,npcm750-pspi";26 reg = <0xf0200000 0x1000>;27 pinctrl-names = "default";28 pinctrl-0 = <&pspi1_pins>;29 #address-cells = <1>;30 #size-cells = <0>;31 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;32 clocks = <&clk NPCM7XX_CLK_APB5>;33 clock-names = "clk_apb5";34 resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>35 cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;36};37