brintos

brintos / linux-shallow public Read only

0
0
Text · 5.7 KiB · 49649fc Raw
188 lines · yaml
1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Renesas MSIOF SPI controller8 9maintainers:10  - Geert Uytterhoeven <geert+renesas@glider.be>11 12allOf:13  - $ref: spi-controller.yaml#14 15properties:16  compatible:17    oneOf:18      - items:19          - const: renesas,msiof-sh73a0     # SH-Mobile AG520          - const: renesas,sh-mobile-msiof  # generic SH-Mobile compatible21                                            # device22      - items:23          - enum:24              - renesas,msiof-r8a7742       # RZ/G1H25              - renesas,msiof-r8a7743       # RZ/G1M26              - renesas,msiof-r8a7744       # RZ/G1N27              - renesas,msiof-r8a7745       # RZ/G1E28              - renesas,msiof-r8a77470      # RZ/G1C29              - renesas,msiof-r8a7790       # R-Car H230              - renesas,msiof-r8a7791       # R-Car M2-W31              - renesas,msiof-r8a7792       # R-Car V2H32              - renesas,msiof-r8a7793       # R-Car M2-N33              - renesas,msiof-r8a7794       # R-Car E234          - const: renesas,rcar-gen2-msiof  # generic R-Car Gen2 and RZ/G135                                            # compatible device36      - items:37          - enum:38              - renesas,msiof-r8a774a1      # RZ/G2M39              - renesas,msiof-r8a774b1      # RZ/G2N40              - renesas,msiof-r8a774c0      # RZ/G2E41              - renesas,msiof-r8a774e1      # RZ/G2H42              - renesas,msiof-r8a7795       # R-Car H343              - renesas,msiof-r8a7796       # R-Car M3-W44              - renesas,msiof-r8a77961      # R-Car M3-W+45              - renesas,msiof-r8a77965      # R-Car M3-N46              - renesas,msiof-r8a77970      # R-Car V3M47              - renesas,msiof-r8a77980      # R-Car V3H48              - renesas,msiof-r8a77990      # R-Car E349              - renesas,msiof-r8a77995      # R-Car D350          - const: renesas,rcar-gen3-msiof  # generic R-Car Gen3 and RZ/G251                                            # compatible device52      - items:53          - enum:54              - renesas,msiof-r8a779a0      # R-Car V3U55              - renesas,msiof-r8a779f0      # R-Car S4-856              - renesas,msiof-r8a779g0      # R-Car V4H57              - renesas,msiof-r8a779h0      # R-Car V4M58          - const: renesas,rcar-gen4-msiof  # generic R-Car Gen459                                            # compatible device60      - items:61          - const: renesas,sh-msiof  # deprecated62 63  reg:64    minItems: 165    maxItems: 266    oneOf:67      - items:68          - description: CPU and DMA engine registers69      - items:70          - description: CPU registers71          - description: DMA engine registers72 73  interrupts:74    maxItems: 175 76  clocks:77    maxItems: 178 79  power-domains:80    maxItems: 181 82  resets:83    maxItems: 184 85  num-cs:86    description: |87      Total number of chip selects (default is 1).88      Up to 3 native chip selects are supported:89        0: MSIOF_SYNC90        1: MSIOF_SS191        2: MSIOF_SS292      Hardware limitations related to chip selects:93        - Native chip selects are always deasserted in between transfers94          that are part of the same message.  Use cs-gpios to work around95          this.96        - All slaves using native chip selects must use the same spi-cs-high97          configuration.  Use cs-gpios to work around this.98        - When using GPIO chip selects, at least one native chip select must99          be left unused, as it will be driven anyway.100    minimum: 1101    maximum: 3102    default: 1103 104  dmas:105    minItems: 2106    maxItems: 4107 108  dma-names:109    minItems: 2110    maxItems: 4111    items:112      enum: [ tx, rx ]113 114  renesas,dtdl:115    description: delay sync signal (setup) in transmit mode.116    $ref: /schemas/types.yaml#/definitions/uint32117    enum:118      - 0        # no bit delay119      - 50       # 0.5-clock-cycle delay120      - 100      # 1-clock-cycle delay121      - 150      # 1.5-clock-cycle delay122      - 200      # 2-clock-cycle delay123 124  renesas,syncdl:125    description: delay sync signal (hold) in transmit mode126    $ref: /schemas/types.yaml#/definitions/uint32127    enum:128      - 0        # no bit delay129      - 50       # 0.5-clock-cycle delay130      - 100      # 1-clock-cycle delay131      - 150      # 1.5-clock-cycle delay132      - 200      # 2-clock-cycle delay133      - 300      # 3-clock-cycle delay134 135  renesas,tx-fifo-size:136    # deprecated for soctype-specific bindings137    description: |138      Override the default TX fifo size.  Unit is words.  Ignored if 0.139    $ref: /schemas/types.yaml#/definitions/uint32140    default: 64141 142  renesas,rx-fifo-size:143    # deprecated for soctype-specific bindings144    description: |145      Override the default RX fifo size.  Unit is words.  Ignored if 0.146    $ref: /schemas/types.yaml#/definitions/uint32147    default: 64148 149required:150  - compatible151  - reg152  - interrupts153  - clocks154  - power-domains155  - '#address-cells'156  - '#size-cells'157 158if:159  not:160    properties:161      compatible:162        contains:163          const: renesas,sh-mobile-msiof164then:165  required:166    - resets167 168unevaluatedProperties: false169 170examples:171  - |172    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>173    #include <dt-bindings/interrupt-controller/arm-gic.h>174    #include <dt-bindings/power/r8a7791-sysc.h>175 176    msiof0: spi@e6e20000 {177        compatible = "renesas,msiof-r8a7791", "renesas,rcar-gen2-msiof";178        reg = <0xe6e20000 0x0064>;179        interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;180        clocks = <&cpg CPG_MOD 000>;181        dmas = <&dmac0 0x51>, <&dmac0 0x52>;182        dma-names = "tx", "rx";183        power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;184        resets = <&cpg 0>;185        #address-cells = <1>;186        #size-cells = <0>;187    };188