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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/spi/samsung,spi.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Samsung S3C/S5P/Exynos SoC SPI controller8 9maintainers:10 - Krzysztof Kozlowski <krzk@kernel.org>11 12description:13 All the SPI controller nodes should be represented in the aliases node using14 the following format 'spi{n}' where n is a unique number for the alias.15 16properties:17 compatible:18 oneOf:19 - enum:20 - google,gs101-spi21 - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C245022 - samsung,s3c6410-spi23 - samsung,s5pv210-spi # for S5PV210 and S5PC11024 - samsung,exynos4210-spi25 - samsung,exynos5433-spi26 - samsung,exynos850-spi27 - samsung,exynosautov9-spi28 - tesla,fsd-spi29 - const: samsung,exynos7-spi30 deprecated: true31 32 clocks:33 minItems: 234 maxItems: 335 36 clock-names:37 minItems: 238 maxItems: 339 40 dmas:41 minItems: 242 maxItems: 243 44 dma-names:45 items:46 - const: tx47 - const: rx48 49 interrupts:50 maxItems: 151 52 no-cs-readback:53 description:54 The CS line is disconnected, therefore the device should not operate55 based on CS signalling.56 type: boolean57 58 num-cs:59 minimum: 160 maximum: 461 default: 162 63 samsung,spi-src-clk:64 description:65 If the spi controller includes a internal clock mux to select the clock66 source for the spi bus clock, this property can be used to indicate the67 clock to be used for driving the spi bus clock. If not specified, the68 clock number 0 is used as default.69 $ref: /schemas/types.yaml#/definitions/uint3270 default: 071 72 reg:73 maxItems: 174 75required:76 - compatible77 - clocks78 - clock-names79 - interrupts80 - reg81 82allOf:83 - $ref: spi-controller.yaml#84 - if:85 properties:86 compatible:87 contains:88 enum:89 - samsung,exynos5433-spi90 - samsung,exynosautov9-spi91 then:92 properties:93 clocks:94 minItems: 395 maxItems: 396 clock-names:97 items:98 - const: spi99 - enum:100 - spi_busclk0101 - spi_busclk1102 - spi_busclk2103 - spi_busclk3104 - const: spi_ioclk105 else:106 properties:107 clocks:108 minItems: 2109 maxItems: 2110 clock-names:111 items:112 - const: spi113 - enum:114 - spi_busclk0115 - spi_busclk1116 - spi_busclk2117 - spi_busclk3118 119unevaluatedProperties: false120 121examples:122 - |123 #include <dt-bindings/clock/exynos5433.h>124 #include <dt-bindings/clock/samsung,s2mps11.h>125 #include <dt-bindings/interrupt-controller/arm-gic.h>126 #include <dt-bindings/gpio/gpio.h>127 128 spi@14d30000 {129 compatible = "samsung,exynos5433-spi";130 reg = <0x14d30000 0x100>;131 interrupts = <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>;132 dmas = <&pdma0 11>, <&pdma0 10>;133 dma-names = "tx", "rx";134 #address-cells = <1>;135 #size-cells = <0>;136 clocks = <&cmu_peric CLK_PCLK_SPI1>,137 <&cmu_peric CLK_SCLK_SPI1>,138 <&cmu_peric CLK_SCLK_IOCLK_SPI1>;139 clock-names = "spi",140 "spi_busclk0",141 "spi_ioclk";142 samsung,spi-src-clk = <0>;143 pinctrl-names = "default";144 pinctrl-0 = <&spi1_bus>;145 num-cs = <1>;146 147 cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;148 149 audio-codec@0 {150 compatible = "wlf,wm5110";151 reg = <0x0>;152 spi-max-frequency = <20000000>;153 interrupt-parent = <&gpa0>;154 interrupts = <4 IRQ_TYPE_NONE>;155 clocks = <&pmu_system_controller 0>,156 <&s2mps13_osc S2MPS11_CLK_BT>;157 clock-names = "mclk1", "mclk2";158 159 gpio-controller;160 #gpio-cells = <2>;161 interrupt-controller;162 #interrupt-cells = <2>;163 164 wlf,micd-detect-debounce = <300>;165 wlf,micd-bias-start-time = <0x1>;166 wlf,micd-rate = <0x7>;167 wlf,micd-dbtime = <0x2>;168 wlf,micd-force-micbias;169 wlf,micd-configs = <0x0 1 0>;170 wlf,hpdet-channel = <1>;171 wlf,gpsw = <0x1>;172 wlf,inmode = <2 0 2 0>;173 174 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;175 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;176 177 /* core supplies */178 AVDD-supply = <&ldo18_reg>;179 DBVDD1-supply = <&ldo18_reg>;180 CPVDD-supply = <&ldo18_reg>;181 DBVDD2-supply = <&ldo18_reg>;182 DBVDD3-supply = <&ldo18_reg>;183 SPKVDDL-supply = <&ldo18_reg>;184 SPKVDDR-supply = <&ldo18_reg>;185 186 controller-data {187 samsung,spi-feedback-delay = <0>;188 };189 };190 };191