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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Freescale Low Power SPI (LPSPI) for i.MX8 9maintainers:10 - Shawn Guo <shawnguo@kernel.org>11 - Sascha Hauer <s.hauer@pengutronix.de>12 - Fabio Estevam <festevam@gmail.com>13 14allOf:15 - $ref: /schemas/spi/spi-controller.yaml#16 17properties:18 compatible:19 oneOf:20 - enum:21 - fsl,imx7ulp-spi22 - fsl,imx8qxp-spi23 - items:24 - enum:25 - fsl,imx8ulp-spi26 - fsl,imx93-spi27 - fsl,imx95-spi28 - const: fsl,imx7ulp-spi29 reg:30 maxItems: 131 32 interrupts:33 maxItems: 134 35 clocks:36 items:37 - description: SoC SPI per clock38 - description: SoC SPI ipg clock39 40 clock-names:41 items:42 - const: per43 - const: ipg44 45 dmas:46 items:47 - description: TX DMA Channel48 - description: RX DMA Channel49 50 dma-names:51 items:52 - const: tx53 - const: rx54 55 fsl,spi-only-use-cs1-sel:56 description:57 spi common code does not support use of CS signals discontinuously.58 i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add59 this property to re-config the chipselect value in the LPSPI driver.60 type: boolean61 62 num-cs:63 description:64 number of chip selects.65 minimum: 166 maximum: 267 default: 168 69 power-domains:70 maxItems: 171 72required:73 - compatible74 - reg75 - interrupts76 - clocks77 - clock-names78 79unevaluatedProperties: false80 81examples:82 - |83 #include <dt-bindings/clock/imx7ulp-clock.h>84 #include <dt-bindings/interrupt-controller/arm-gic.h>85 86 spi@40290000 {87 compatible = "fsl,imx7ulp-spi";88 reg = <0x40290000 0x10000>;89 interrupt-parent = <&intc>;90 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;91 clocks = <&clks IMX7ULP_CLK_LPSPI2>,92 <&clks IMX7ULP_CLK_DUMMY>;93 clock-names = "per", "ipg";94 spi-slave;95 fsl,spi-only-use-cs1-sel;96 num-cs = <2>;97 };98