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1# SPDX-License-Identifier: GPL-2.0-only2%YAML 1.23---4$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Temperature Sensor ADC (TSADC) on Rockchip SoCs8 9maintainers:10  - Heiko Stuebner <heiko@sntech.de>11 12$ref: thermal-sensor.yaml#13 14properties:15  compatible:16    enum:17      - rockchip,px30-tsadc18      - rockchip,rk3228-tsadc19      - rockchip,rk3288-tsadc20      - rockchip,rk3328-tsadc21      - rockchip,rk3368-tsadc22      - rockchip,rk3399-tsadc23      - rockchip,rk3568-tsadc24      - rockchip,rk3588-tsadc25      - rockchip,rv1108-tsadc26 27  reg:28    maxItems: 129 30  interrupts:31    maxItems: 132 33  clocks:34    minItems: 235    maxItems: 236 37  clock-names:38    items:39      - const: tsadc40      - const: apb_pclk41 42  resets:43    minItems: 144    maxItems: 345 46  reset-names:47    minItems: 148    items:49      - const: tsadc-apb50      - const: tsadc51      - const: tsadc-phy52 53  "#thermal-sensor-cells":54    const: 155 56  rockchip,grf:57    description: The phandle of the syscon node for the general register file.58    $ref: /schemas/types.yaml#/definitions/phandle59 60  rockchip,hw-tshut-temp:61    description: The hardware-controlled shutdown temperature value.62    $ref: /schemas/types.yaml#/definitions/uint3263 64  rockchip,hw-tshut-mode:65    description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.66    $ref: /schemas/types.yaml#/definitions/uint3267    enum: [0, 1]68 69  rockchip,hw-tshut-polarity:70    description: The hardware-controlled active polarity 0:LOW 1:HIGH.71    $ref: /schemas/types.yaml#/definitions/uint3272    enum: [0, 1]73 74required:75  - compatible76  - reg77  - interrupts78  - clocks79  - clock-names80  - resets81 82unevaluatedProperties: false83 84examples:85  - |86    #include <dt-bindings/interrupt-controller/arm-gic.h>87    #include <dt-bindings/clock/rk3288-cru.h>88 89    tsadc: tsadc@ff280000 {90        compatible = "rockchip,rk3288-tsadc";91        reg = <0xff280000 0x100>;92        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;93        clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;94        clock-names = "tsadc", "apb_pclk";95        resets = <&cru SRST_TSADC>;96        reset-names = "tsadc-apb";97        #thermal-sensor-cells = <1>;98        rockchip,hw-tshut-temp = <95000>;99        rockchip,hw-tshut-mode = <0>;100        rockchip,hw-tshut-polarity = <0>;101    };102