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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/thermal/samsung,exynos-thermal.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Samsung Exynos SoC Thermal Management Unit (TMU)8 9maintainers:10 - Krzysztof Kozlowski <krzk@kernel.org>11 12description: |13 For multi-instance tmu each instance should have an alias correctly numbered14 in "aliases" node.15 16properties:17 compatible:18 enum:19 - samsung,exynos3250-tmu20 - samsung,exynos4412-tmu21 - samsung,exynos4210-tmu22 - samsung,exynos5250-tmu23 - samsung,exynos5260-tmu24 # For TMU channel 0, 1 on Exynos5420:25 - samsung,exynos5420-tmu26 # For TMU channels 2, 3 and 4 of Exynos5420:27 - samsung,exynos5420-tmu-ext-triminfo28 - samsung,exynos5433-tmu29 - samsung,exynos7-tmu30 31 clocks:32 minItems: 133 maxItems: 334 35 clock-names:36 minItems: 137 maxItems: 338 39 interrupts:40 description: |41 The Exynos TMU supports generating interrupts when reaching given42 temperature thresholds. Number of supported thermal trip points depends43 on the SoC (only first trip points defined in DT will be configured)::44 - most of SoC: 445 - samsung,exynos5433-tmu: 846 - samsung,exynos7-tmu: 847 maxItems: 148 49 reg:50 items:51 - description: TMU instance registers.52 - description: |53 Shared TMU registers.54 55 Note:: On Exynos5420, the TRIMINFO register is misplaced for TMU56 channels 2, 3 and 4 Use "samsung,exynos5420-tmu-ext-triminfo" in57 cases, there is a misplaced register, also provide clock to access58 that base.59 TRIMINFO at 0x1006c000 contains data for TMU channel 360 TRIMINFO at 0x100a0000 contains data for TMU channel 461 TRIMINFO at 0x10068000 contains data for TMU channel 262 minItems: 163 64 '#thermal-sensor-cells':65 const: 066 67 vtmu-supply:68 description: The regulator node supplying voltage to TMU.69 70required:71 - compatible72 - clocks73 - clock-names74 - interrupts75 - reg76 77allOf:78 - $ref: /schemas/thermal/thermal-sensor.yaml79 - if:80 properties:81 compatible:82 contains:83 const: samsung,exynos5420-tmu-ext-triminfo84 then:85 properties:86 clocks:87 items:88 - description:89 Operational clock for TMU channel.90 - description:91 Optional clock to access the shared registers (e.g. TRIMINFO) of TMU92 channel.93 clock-names:94 items:95 - const: tmu_apbif96 - const: tmu_triminfo_apbif97 reg:98 minItems: 299 maxItems: 2100 - if:101 properties:102 compatible:103 contains:104 enum:105 - samsung,exynos5433-tmu106 - samsung,exynos7-tmu107 then:108 properties:109 clocks:110 items:111 - description:112 Operational clock for TMU channel.113 - description:114 Optional special clock for functional operation of TMU channel.115 clock-names:116 items:117 - const: tmu_apbif118 - const: tmu_sclk119 reg:120 minItems: 1121 maxItems: 1122 123 - if:124 properties:125 compatible:126 contains:127 enum:128 - samsung,exynos3250-tmu129 - samsung,exynos4412-tmu130 - samsung,exynos4210-tmu131 - samsung,exynos5250-tmu132 - samsung,exynos5260-tmu133 - samsung,exynos5420-tmu134 then:135 properties:136 clocks:137 minItems: 1138 maxItems: 1139 reg:140 minItems: 1141 maxItems: 1142 143additionalProperties: false144 145examples:146 - |147 #include <dt-bindings/clock/exynos4.h>148 149 tmu@100c0000 {150 compatible = "samsung,exynos4412-tmu";151 reg = <0x100C0000 0x100>;152 interrupt-parent = <&combiner>;153 interrupts = <2 4>;154 #thermal-sensor-cells = <0>;155 clocks = <&clock CLK_TMU_APBIF>;156 clock-names = "tmu_apbif";157 vtmu-supply = <&ldo10_reg>;158 };159 160 - |161 #include <dt-bindings/interrupt-controller/arm-gic.h>162 163 tmu@10068000 {164 compatible = "samsung,exynos5420-tmu-ext-triminfo";165 reg = <0x10068000 0x100>, <0x1006c000 0x4>;166 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;167 #thermal-sensor-cells = <0>;168 clocks = <&clock 318>, <&clock 318>; /* CLK_TMU */169 clock-names = "tmu_apbif", "tmu_triminfo_apbif";170 vtmu-supply = <&ldo7_reg>;171 };172 173 - |174 #include <dt-bindings/interrupt-controller/arm-gic.h>175 176 tmu@10060000 {177 compatible = "samsung,exynos5433-tmu";178 reg = <0x10060000 0x200>;179 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;180 #thermal-sensor-cells = <0>;181 clocks = <&cmu_peris 3>, /* CLK_PCLK_TMU0_APBIF */182 <&cmu_peris 35>; /* CLK_SCLK_TMU0 */183 clock-names = "tmu_apbif", "tmu_sclk";184 vtmu-supply = <&ldo3_reg>;185 };186