112 lines · yaml
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/usb/cdns,usb3.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Cadence USBSS-DRD controller8 9maintainers:10 - Pawel Laszczak <pawell@cadence.com>11 12properties:13 compatible:14 const: cdns,usb315 16 reg:17 items:18 - description: OTG controller registers19 - description: XHCI Host controller registers20 - description: DEVICE controller registers21 22 reg-names:23 items:24 - const: otg25 - const: xhci26 - const: dev27 28 interrupts:29 minItems: 330 items:31 - description: XHCI host controller interrupt32 - description: Device controller interrupt33 - description: OTG/DRD controller interrupt34 - description: interrupt used to wake up core, e.g when usbcmd.rs is35 cleared by xhci core, this interrupt is optional36 37 interrupt-names:38 minItems: 339 items:40 - const: host41 - const: peripheral42 - const: otg43 - const: wakeup44 45 port:46 $ref: /schemas/graph.yaml#/properties/port47 description:48 This port is used with the 'usb-role-switch' property to connect the49 cdns3 to type C connector.50 51 maximum-speed:52 enum: [super-speed, high-speed, full-speed]53 54 phys:55 minItems: 156 maxItems: 257 58 phy-names:59 minItems: 160 maxItems: 261 items:62 anyOf:63 - const: cdns3,usb2-phy64 - const: cdns3,usb3-phy65 66 cdns,on-chip-buff-size:67 description:68 size of memory intended as internal memory for endpoints69 buffers expressed in KB70 $ref: /schemas/types.yaml#/definitions/uint1671 72 cdns,phyrst-a-enable:73 description: Enable resetting of PHY if Rx fail is detected74 type: boolean75 76dependencies:77 port: [ usb-role-switch ]78 79required:80 - compatible81 - reg82 - reg-names83 - interrupts84 - interrupt-names85 86allOf:87 - $ref: usb-drd.yaml#88 89unevaluatedProperties: false90 91examples:92 - |93 #include <dt-bindings/interrupt-controller/arm-gic.h>94 bus {95 #address-cells = <2>;96 #size-cells = <2>;97 98 usb@6000000 {99 compatible = "cdns,usb3";100 reg = <0x00 0x6000000 0x00 0x10000>,101 <0x00 0x6010000 0x00 0x10000>,102 <0x00 0x6020000 0x00 0x10000>;103 reg-names = "otg", "xhci", "dev";104 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,105 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,106 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;107 interrupt-names = "host", "peripheral", "otg";108 maximum-speed = "super-speed";109 dr_mode = "otg";110 };111 };112