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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2# Copyright (c) 2020 MediaTek3%YAML 1.24---5$id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#6$schema: http://devicetree.org/meta-schemas/core.yaml#7 8title: MediaTek USB3 xHCI9 10maintainers:11  - Chunfeng Yun <chunfeng.yun@mediatek.com>12 13allOf:14  - $ref: usb-xhci.yaml15 16description: |17  There are two scenarios:18  case 1: only supports xHCI driver;19  case 2: supports dual-role mode, and the host is based on xHCI driver.20 21properties:22  # common properties for both case 1 and case 223  compatible:24    items:25      - enum:26          - mediatek,mt2701-xhci27          - mediatek,mt2712-xhci28          - mediatek,mt7622-xhci29          - mediatek,mt7623-xhci30          - mediatek,mt7629-xhci31          - mediatek,mt7986-xhci32          - mediatek,mt7988-xhci33          - mediatek,mt8173-xhci34          - mediatek,mt8183-xhci35          - mediatek,mt8186-xhci36          - mediatek,mt8188-xhci37          - mediatek,mt8192-xhci38          - mediatek,mt8195-xhci39          - mediatek,mt8365-xhci40      - const: mediatek,mtk-xhci41 42  reg:43    minItems: 144    items:45      - description: the registers of xHCI MAC46      - description: the registers of IP Port Control47 48  reg-names:49    minItems: 150    items:51      - const: mac52      - const: ippc  # optional, only needed for case 1.53 54  interrupts:55    description:56      use "interrupts-extended" when the interrupts are connected to the57      separate interrupt controllers58    minItems: 159    items:60      - description: xHCI host controller interrupt61      - description: optional, wakeup interrupt used to support runtime PM62 63  interrupt-names:64    minItems: 165    items:66      - const: host67      - const: wakeup68 69  power-domains:70    description: A phandle to USB power domain node to control USB's MTCMOS71    maxItems: 172 73  clocks:74    minItems: 175    items:76      - description: Controller clock used by normal mode77      - description: Reference clock used by low power mode etc78      - description: Mcu bus clock for register access79      - description: DMA bus clock for data transfer80      - description: controller clock81      - description: frame count clock82 83  clock-names:84    minItems: 185    items:86      - const: sys_ck  # required, the following ones are optional87      - const: ref_ck88      - const: mcu_ck89      - const: dma_ck90      - const: xhci_ck91      - const: frmcnt_ck92 93  phys:94    description:95      List of all PHYs used on this HCD, it's better to keep PHYs in order96      as the hardware layout97    minItems: 198    items:99      - description: USB2/HS PHY    # required, others are optional100      - description: USB3/SS(P) PHY101      - description: USB2/HS PHY102      - description: USB3/SS(P) PHY103      - description: USB2/HS PHY104      - description: USB3/SS(P) PHY105      - description: USB2/HS PHY106      - description: USB3/SS(P) PHY107      - description: USB2/HS PHY108 109  vusb33-supply:110    description: Regulator of USB AVDD3.3v111 112  vbus-supply:113    description: Regulator of USB VBUS5v114 115  resets:116    maxItems: 1117 118  usb3-lpm-capable: true119 120  usb2-lpm-disable: true121 122  imod-interval-ns:123    description:124      Interrupt moderation interval value, it is 8 times as much as that125      defined in the xHCI spec on MTK's controller.126    default: 5000127 128  rx-fifo-depth:129    $ref: /schemas/types.yaml#/definitions/uint32130    description:131      It is a quirk used to work around Gen1 isoc-in endpoint transfer issue132      that still send out unexpected ACK after device finishes the burst133      transfer with a short packet and cause an exception, specially on a 4K134      camera device, it happens on controller before about IPM v1.6.0;135      the side-effect is that it may cause performance drop about 10%,136      including bulk transfer, prefer to use 3k here. The size is in bytes.137    enum: [1024, 2048, 3072, 4096]138 139  # the following properties are only used for case 1140  wakeup-source:141    description: enable USB remote wakeup, see power/wakeup-source.txt142    type: boolean143 144  mediatek,syscon-wakeup:145    $ref: /schemas/types.yaml#/definitions/phandle-array146    maxItems: 1147    description:148      A phandle to syscon used to access the register of the USB wakeup glue149      layer between xHCI and SPM, the field should always be 3 cells long.150    items:151      items:152        - description:153            The first cell represents a phandle to syscon154        - description:155            The second cell represents the register base address of the glue156            layer in syscon157        - description: |158            The third cell represents the hardware version of the glue layer,159            1 - used by mt8173 etc, revision 1 without following IPM rule;160            2 - used by mt2712 etc, revision 2 following IPM rule;161            101 - used by mt8183, specific 1.01;162            102 - used by mt8192, specific 1.02;163            103 - used by mt8195, IP0, specific 1.03;164            104 - used by mt8195, IP1, specific 1.04;165            105 - used by mt8195, IP2, specific 1.05;166            106 - used by mt8195, IP3, specific 1.06;167          enum: [1, 2, 101, 102, 103, 104, 105, 106]168 169  mediatek,u3p-dis-msk:170    $ref: /schemas/types.yaml#/definitions/uint32171    description: The mask to disable u3ports, bit0 for u3port0,172      bit1 for u3port1, ... etc173 174  mediatek,u2p-dis-msk:175    $ref: /schemas/types.yaml#/definitions/uint32176    description: The mask to disable u2ports, bit0 for u2port0,177      bit1 for u2port1, ... etc178 179  "#address-cells":180    const: 1181 182  "#size-cells":183    const: 0184 185patternProperties:186  "@[0-9a-f]{1}$":187    type: object188    description: The hard wired USB devices.189 190dependencies:191  wakeup-source: [ 'mediatek,syscon-wakeup' ]192 193required:194  - compatible195  - reg196  - reg-names197  - interrupts198  - clocks199  - clock-names200 201additionalProperties: false202 203examples:204  - |205    #include <dt-bindings/clock/mt8173-clk.h>206    #include <dt-bindings/interrupt-controller/arm-gic.h>207    #include <dt-bindings/interrupt-controller/irq.h>208    #include <dt-bindings/phy/phy.h>209    #include <dt-bindings/power/mt8173-power.h>210 211    usb@11270000 {212        compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";213        reg = <0x11270000 0x1000>, <0x11280700 0x0100>;214        reg-names = "mac", "ippc";215        interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;216        power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;217        clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;218        clock-names = "sys_ck", "ref_ck";219        phys = <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>;220        vusb33-supply = <&mt6397_vusb_reg>;221        vbus-supply = <&usb_p1_vbus>;222        imod-interval-ns = <10000>;223        mediatek,syscon-wakeup = <&pericfg 0x400 1>;224        wakeup-source;225        usb3-lpm-capable;226    };227...228