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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/usb/rockchip,dwc3.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Rockchip SuperSpeed DWC3 USB SoC controller8 9maintainers:10 - Heiko Stuebner <heiko@sntech.de>11 12description:13 The common content of the node is defined in snps,dwc3.yaml.14 15 Phy documentation is provided in the following places.16 17 USB2.0 PHY18 Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml19 20 Type-C PHY21 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt22 23select:24 properties:25 compatible:26 contains:27 enum:28 - rockchip,rk3328-dwc329 - rockchip,rk3568-dwc330 - rockchip,rk3588-dwc331 required:32 - compatible33 34properties:35 compatible:36 items:37 - enum:38 - rockchip,rk3328-dwc339 - rockchip,rk3568-dwc340 - rockchip,rk3588-dwc341 - const: snps,dwc342 43 reg:44 maxItems: 145 46 interrupts:47 maxItems: 148 49 clocks:50 minItems: 351 items:52 - description:53 Controller reference clock, must to be 24 MHz54 - description:55 Controller suspend clock, must to be 24 MHz or 32 KHz56 - description:57 Master/Core clock, must to be >= 62.5 MHz for SS58 operation and >= 30MHz for HS operation59 - description:60 Controller grf clock OR UTMI clock61 - description:62 PIPE clock63 64 clock-names:65 minItems: 366 items:67 - const: ref_clk68 - const: suspend_clk69 - const: bus_clk70 - enum:71 - grf_clk72 - utmi73 - const: pipe74 75 power-domains:76 maxItems: 177 78 resets:79 maxItems: 180 81 reset-names:82 const: usb3-otg83 84unevaluatedProperties: false85 86required:87 - compatible88 - reg89 - interrupts90 - clocks91 - clock-names92 93allOf:94 - $ref: snps,dwc3.yaml#95 - if:96 properties:97 compatible:98 contains:99 const: rockchip,rk3328-dwc3100 then:101 properties:102 clocks:103 minItems: 3104 maxItems: 4105 clock-names:106 minItems: 3107 items:108 - const: ref_clk109 - const: suspend_clk110 - const: bus_clk111 - const: grf_clk112 - if:113 properties:114 compatible:115 contains:116 const: rockchip,rk3568-dwc3117 then:118 properties:119 clocks:120 maxItems: 3121 clock-names:122 maxItems: 3123 - if:124 properties:125 compatible:126 contains:127 const: rockchip,rk3588-dwc3128 then:129 properties:130 clock-names:131 minItems: 3132 items:133 - const: ref_clk134 - const: suspend_clk135 - const: bus_clk136 - const: utmi137 - const: pipe138 139examples:140 - |141 #include <dt-bindings/clock/rk3328-cru.h>142 #include <dt-bindings/interrupt-controller/arm-gic.h>143 144 bus {145 #address-cells = <2>;146 #size-cells = <2>;147 148 usbdrd3_0: usb@fe800000 {149 compatible = "rockchip,rk3328-dwc3", "snps,dwc3";150 reg = <0x0 0xfe800000 0x0 0x100000>;151 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;152 clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,153 <&cru ACLK_USB3OTG>;154 clock-names = "ref_clk", "suspend_clk",155 "bus_clk", "grf_clk";156 dr_mode = "otg";157 };158 };159