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1# SPDX-License-Identifier: GPL-2.02%YAML 1.23---4$id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: ARM AMBA Primecell SP805 Watchdog8 9maintainers:10 - Viresh Kumar <vireshk@kernel.org>11 12description: |+13 The Arm SP805 IP implements a watchdog device, which triggers an interrupt14 after a configurable time period. If that interrupt has not been serviced15 when the next interrupt would be triggered, the reset signal is asserted.16 17allOf:18 - $ref: /schemas/watchdog/watchdog.yaml#19 20# Need a custom select here or 'arm,primecell' will match on lots of nodes21select:22 properties:23 compatible:24 contains:25 const: arm,sp80526 required:27 - compatible28 29properties:30 compatible:31 items:32 - const: arm,sp80533 - const: arm,primecell34 35 interrupts:36 maxItems: 137 38 reg:39 maxItems: 140 41 clocks:42 description: |43 Clocks driving the watchdog timer hardware. The first clock is used44 for the actual watchdog counter. The second clock drives the register45 interface.46 maxItems: 247 48 clock-names:49 items:50 - const: wdog_clk51 - const: apb_pclk52 53 resets:54 maxItems: 155 description: WDOGRESn input reset signal for sp805 module.56 57required:58 - compatible59 - reg60 - clocks61 - clock-names62 63unevaluatedProperties: false64 65examples:66 - |67 #include <dt-bindings/interrupt-controller/arm-gic.h>68 watchdog@66090000 {69 compatible = "arm,sp805", "arm,primecell";70 reg = <0x66090000 0x1000>;71 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;72 clocks = <&wdt_clk>, <&apb_pclk>;73 clock-names = "wdog_clk", "apb_pclk";74 resets = <&wdt_rst>;75 };76