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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2%YAML 1.23---4$id: http://devicetree.org/schemas/watchdog/marvell,cn10624-wdt.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Marvell Global Timer (GTI) system watchdog8 9maintainers:10 - Bharat Bhushan <bbhushan2@marvell.com>11 12allOf:13 - $ref: watchdog.yaml#14 15properties:16 compatible:17 oneOf:18 - enum:19 - marvell,cn9670-wdt20 - marvell,cn10624-wdt21 22 - items:23 - enum:24 - marvell,cn9880-wdt25 - marvell,cnf9535-wdt26 - const: marvell,cn9670-wdt27 28 - items:29 - enum:30 - marvell,cn10308-wdt31 - marvell,cnf10518-wdt32 - const: marvell,cn10624-wdt33 34 reg:35 maxItems: 136 37 interrupts:38 maxItems: 139 40 clocks:41 maxItems: 142 43 clock-names:44 items:45 - const: refclk46 47 marvell,wdt-timer-index:48 $ref: /schemas/types.yaml#/definitions/uint3249 minimum: 050 maximum: 6351 description:52 An SoC have many timers (up to 64), firmware can reserve one or more timer53 for some other use case and configures one of the global timer as watchdog54 timer. Firmware will update this field with the timer number configured55 as watchdog timer.56 57required:58 - compatible59 - reg60 - interrupts61 - clocks62 - clock-names63 64unevaluatedProperties: false65 66examples:67 - |68 #include <dt-bindings/interrupt-controller/arm-gic.h>69 soc {70 #address-cells = <2>;71 #size-cells = <2>;72 73 watchdog@802000040000 {74 compatible = "marvell,cn9670-wdt";75 reg = <0x00008020 0x00040000 0x00000000 0x00020000>;76 interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>;77 clocks = <&sclk>;78 clock-names = "refclk";79 marvell,wdt-timer-index = <63>;80 };81 };82 83...84