69 lines · yaml
1# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause2%YAML 1.23---4$id: http://devicetree.org/schemas/watchdog/xlnx,xps-timebase-wdt.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#6 7title: Xilinx AXI/PLB softcore and window Watchdog Timer8 9maintainers:10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>11 - Srinivas Neeli <srinivas.neeli@amd.com>12 13description:14 The Timebase watchdog timer(WDT) is a free-running 32 bit counter.15 WDT uses a dual-expiration architecture. After one expiration of16 the timeout interval, an interrupt is generated and the WDT state17 bit is set to one in the status register. If the state bit is not18 cleared (by writing a one to the state bit) before the next19 expiration of the timeout interval, a WDT reset is generated.20 21allOf:22 - $ref: watchdog.yaml#23 24properties:25 compatible:26 enum:27 - xlnx,xps-timebase-wdt-1.01.a28 - xlnx,xps-timebase-wdt-1.00.a29 30 reg:31 maxItems: 132 33 clocks:34 maxItems: 135 36 clock-frequency:37 description: Frequency of clock in Hz38 39 xlnx,wdt-interval:40 $ref: /schemas/types.yaml#/definitions/uint3241 description: Watchdog timeout interval42 minimum: 843 maximum: 3244 45 xlnx,wdt-enable-once:46 $ref: /schemas/types.yaml#/definitions/uint3247 enum: [0, 1]48 description: If watchdog is configured as enable once,49 then the watchdog cannot be disabled after50 it has been enabled.51 52required:53 - compatible54 - reg55 56unevaluatedProperties: false57 58examples:59 - |60 watchdog@40100000 {61 compatible = "xlnx,xps-timebase-wdt-1.00.a";62 reg = <0x40100000 0x1000>;63 clock-frequency = <50000000>;64 clocks = <&clkc 15>;65 xlnx,wdt-enable-once = <0x0>;66 xlnx,wdt-interval = <0x1b>;67 };68...69