383 lines · plain
1Buffer Sharing and Synchronization (dma-buf)2============================================3 4The dma-buf subsystem provides the framework for sharing buffers for5hardware (DMA) access across multiple device drivers and subsystems, and6for synchronizing asynchronous hardware access.7 8As an example, it is used extensively by the DRM subsystem to exchange9buffers between processes, contexts, library APIs within the same10process, and also to exchange buffers with other subsystems such as11V4L2.12 13This document describes the way in which kernel subsystems can use and14interact with the three main primitives offered by dma-buf:15 16 - dma-buf, representing a sg_table and exposed to userspace as a file17 descriptor to allow passing between processes, subsystems, devices,18 etc;19 - dma-fence, providing a mechanism to signal when an asynchronous20 hardware operation has completed; and21 - dma-resv, which manages a set of dma-fences for a particular dma-buf22 allowing implicit (kernel-ordered) synchronization of work to23 preserve the illusion of coherent access24 25 26Userspace API principles and use27--------------------------------28 29For more details on how to design your subsystem's API for dma-buf use, please30see Documentation/userspace-api/dma-buf-alloc-exchange.rst.31 32 33Shared DMA Buffers34------------------35 36This document serves as a guide to device-driver writers on what is the dma-buf37buffer sharing API, how to use it for exporting and using shared buffers.38 39Any device driver which wishes to be a part of DMA buffer sharing, can do so as40either the 'exporter' of buffers, or the 'user' or 'importer' of buffers.41 42Say a driver A wants to use buffers created by driver B, then we call B as the43exporter, and A as buffer-user/importer.44 45The exporter46 47 - implements and manages operations in :c:type:`struct dma_buf_ops48 <dma_buf_ops>` for the buffer,49 - allows other users to share the buffer by using dma_buf sharing APIs,50 - manages the details of buffer allocation, wrapped in a :c:type:`struct51 dma_buf <dma_buf>`,52 - decides about the actual backing storage where this allocation happens,53 - and takes care of any migration of scatterlist - for all (shared) users of54 this buffer.55 56The buffer-user57 58 - is one of (many) sharing users of the buffer.59 - doesn't need to worry about how the buffer is allocated, or where.60 - and needs a mechanism to get access to the scatterlist that makes up this61 buffer in memory, mapped into its own address space, so it can access the62 same area of memory. This interface is provided by :c:type:`struct63 dma_buf_attachment <dma_buf_attachment>`.64 65Any exporters or users of the dma-buf buffer sharing framework must have a66'select DMA_SHARED_BUFFER' in their respective Kconfigs.67 68Userspace Interface Notes69~~~~~~~~~~~~~~~~~~~~~~~~~70 71Mostly a DMA buffer file descriptor is simply an opaque object for userspace,72and hence the generic interface exposed is very minimal. There's a few things to73consider though:74 75- Since kernel 3.12 the dma-buf FD supports the llseek system call, but only76 with offset=0 and whence=SEEK_END|SEEK_SET. SEEK_SET is supported to allow77 the usual size discover pattern size = SEEK_END(0); SEEK_SET(0). Every other78 llseek operation will report -EINVAL.79 80 If llseek on dma-buf FDs isn't supported the kernel will report -ESPIPE for all81 cases. Userspace can use this to detect support for discovering the dma-buf82 size using llseek.83 84- In order to avoid fd leaks on exec, the FD_CLOEXEC flag must be set85 on the file descriptor. This is not just a resource leak, but a86 potential security hole. It could give the newly exec'd application87 access to buffers, via the leaked fd, to which it should otherwise88 not be permitted access.89 90 The problem with doing this via a separate fcntl() call, versus doing it91 atomically when the fd is created, is that this is inherently racy in a92 multi-threaded app[3]. The issue is made worse when it is library code93 opening/creating the file descriptor, as the application may not even be94 aware of the fd's.95 96 To avoid this problem, userspace must have a way to request O_CLOEXEC97 flag be set when the dma-buf fd is created. So any API provided by98 the exporting driver to create a dmabuf fd must provide a way to let99 userspace control setting of O_CLOEXEC flag passed in to dma_buf_fd().100 101- Memory mapping the contents of the DMA buffer is also supported. See the102 discussion below on `CPU Access to DMA Buffer Objects`_ for the full details.103 104- The DMA buffer FD is also pollable, see `Implicit Fence Poll Support`_ below for105 details.106 107- The DMA buffer FD also supports a few dma-buf-specific ioctls, see108 `DMA Buffer ioctls`_ below for details.109 110Basic Operation and Device DMA Access111~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~112 113.. kernel-doc:: drivers/dma-buf/dma-buf.c114 :doc: dma buf device access115 116CPU Access to DMA Buffer Objects117~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~118 119.. kernel-doc:: drivers/dma-buf/dma-buf.c120 :doc: cpu access121 122Implicit Fence Poll Support123~~~~~~~~~~~~~~~~~~~~~~~~~~~124 125.. kernel-doc:: drivers/dma-buf/dma-buf.c126 :doc: implicit fence polling127 128DMA-BUF statistics129~~~~~~~~~~~~~~~~~~130.. kernel-doc:: drivers/dma-buf/dma-buf-sysfs-stats.c131 :doc: overview132 133DMA Buffer ioctls134~~~~~~~~~~~~~~~~~135 136.. kernel-doc:: include/uapi/linux/dma-buf.h137 138DMA-BUF locking convention139~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~140 141.. kernel-doc:: drivers/dma-buf/dma-buf.c142 :doc: locking convention143 144Kernel Functions and Structures Reference145~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~146 147.. kernel-doc:: drivers/dma-buf/dma-buf.c148 :export:149 150.. kernel-doc:: include/linux/dma-buf.h151 :internal:152 153Reservation Objects154-------------------155 156.. kernel-doc:: drivers/dma-buf/dma-resv.c157 :doc: Reservation Object Overview158 159.. kernel-doc:: drivers/dma-buf/dma-resv.c160 :export:161 162.. kernel-doc:: include/linux/dma-resv.h163 :internal:164 165DMA Fences166----------167 168.. kernel-doc:: drivers/dma-buf/dma-fence.c169 :doc: DMA fences overview170 171DMA Fence Cross-Driver Contract172~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~173 174.. kernel-doc:: drivers/dma-buf/dma-fence.c175 :doc: fence cross-driver contract176 177DMA Fence Signalling Annotations178~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~179 180.. kernel-doc:: drivers/dma-buf/dma-fence.c181 :doc: fence signalling annotation182 183DMA Fence Deadline Hints184~~~~~~~~~~~~~~~~~~~~~~~~185 186.. kernel-doc:: drivers/dma-buf/dma-fence.c187 :doc: deadline hints188 189DMA Fences Functions Reference190~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~191 192.. kernel-doc:: drivers/dma-buf/dma-fence.c193 :export:194 195.. kernel-doc:: include/linux/dma-fence.h196 :internal:197 198DMA Fence Array199~~~~~~~~~~~~~~~200 201.. kernel-doc:: drivers/dma-buf/dma-fence-array.c202 :export:203 204.. kernel-doc:: include/linux/dma-fence-array.h205 :internal:206 207DMA Fence Chain208~~~~~~~~~~~~~~~209 210.. kernel-doc:: drivers/dma-buf/dma-fence-chain.c211 :export:212 213.. kernel-doc:: include/linux/dma-fence-chain.h214 :internal:215 216DMA Fence unwrap217~~~~~~~~~~~~~~~~218 219.. kernel-doc:: include/linux/dma-fence-unwrap.h220 :internal:221 222DMA Fence Sync File223~~~~~~~~~~~~~~~~~~~224 225.. kernel-doc:: drivers/dma-buf/sync_file.c226 :export:227 228.. kernel-doc:: include/linux/sync_file.h229 :internal:230 231DMA Fence Sync File uABI232~~~~~~~~~~~~~~~~~~~~~~~~233 234.. kernel-doc:: include/uapi/linux/sync_file.h235 :internal:236 237Indefinite DMA Fences238~~~~~~~~~~~~~~~~~~~~~239 240At various times struct dma_fence with an indefinite time until dma_fence_wait()241finishes have been proposed. Examples include:242 243* Future fences, used in HWC1 to signal when a buffer isn't used by the display244 any longer, and created with the screen update that makes the buffer visible.245 The time this fence completes is entirely under userspace's control.246 247* Proxy fences, proposed to handle &drm_syncobj for which the fence has not yet248 been set. Used to asynchronously delay command submission.249 250* Userspace fences or gpu futexes, fine-grained locking within a command buffer251 that userspace uses for synchronization across engines or with the CPU, which252 are then imported as a DMA fence for integration into existing winsys253 protocols.254 255* Long-running compute command buffers, while still using traditional end of256 batch DMA fences for memory management instead of context preemption DMA257 fences which get reattached when the compute job is rescheduled.258 259Common to all these schemes is that userspace controls the dependencies of these260fences and controls when they fire. Mixing indefinite fences with normal261in-kernel DMA fences does not work, even when a fallback timeout is included to262protect against malicious userspace:263 264* Only the kernel knows about all DMA fence dependencies, userspace is not aware265 of dependencies injected due to memory management or scheduler decisions.266 267* Only userspace knows about all dependencies in indefinite fences and when268 exactly they will complete, the kernel has no visibility.269 270Furthermore the kernel has to be able to hold up userspace command submission271for memory management needs, which means we must support indefinite fences being272dependent upon DMA fences. If the kernel also support indefinite fences in the273kernel like a DMA fence, like any of the above proposal would, there is the274potential for deadlocks.275 276.. kernel-render:: DOT277 :alt: Indefinite Fencing Dependency Cycle278 :caption: Indefinite Fencing Dependency Cycle279 280 digraph "Fencing Cycle" {281 node [shape=box bgcolor=grey style=filled]282 kernel [label="Kernel DMA Fences"]283 userspace [label="userspace controlled fences"]284 kernel -> userspace [label="memory management"]285 userspace -> kernel [label="Future fence, fence proxy, ..."]286 287 { rank=same; kernel userspace }288 }289 290This means that the kernel might accidentally create deadlocks291through memory management dependencies which userspace is unaware of, which292randomly hangs workloads until the timeout kicks in. Workloads, which from293userspace's perspective, do not contain a deadlock. In such a mixed fencing294architecture there is no single entity with knowledge of all dependencies.295Therefore preventing such deadlocks from within the kernel is not possible.296 297The only solution to avoid dependencies loops is by not allowing indefinite298fences in the kernel. This means:299 300* No future fences, proxy fences or userspace fences imported as DMA fences,301 with or without a timeout.302 303* No DMA fences that signal end of batchbuffer for command submission where304 userspace is allowed to use userspace fencing or long running compute305 workloads. This also means no implicit fencing for shared buffers in these306 cases.307 308Recoverable Hardware Page Faults Implications309~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~310 311Modern hardware supports recoverable page faults, which has a lot of312implications for DMA fences.313 314First, a pending page fault obviously holds up the work that's running on the315accelerator and a memory allocation is usually required to resolve the fault.316But memory allocations are not allowed to gate completion of DMA fences, which317means any workload using recoverable page faults cannot use DMA fences for318synchronization. Synchronization fences controlled by userspace must be used319instead.320 321On GPUs this poses a problem, because current desktop compositor protocols on322Linux rely on DMA fences, which means without an entirely new userspace stack323built on top of userspace fences, they cannot benefit from recoverable page324faults. Specifically this means implicit synchronization will not be possible.325The exception is when page faults are only used as migration hints and never to326on-demand fill a memory request. For now this means recoverable page327faults on GPUs are limited to pure compute workloads.328 329Furthermore GPUs usually have shared resources between the 3D rendering and330compute side, like compute units or command submission engines. If both a 3D331job with a DMA fence and a compute workload using recoverable page faults are332pending they could deadlock:333 334- The 3D workload might need to wait for the compute job to finish and release335 hardware resources first.336 337- The compute workload might be stuck in a page fault, because the memory338 allocation is waiting for the DMA fence of the 3D workload to complete.339 340There are a few options to prevent this problem, one of which drivers need to341ensure:342 343- Compute workloads can always be preempted, even when a page fault is pending344 and not yet repaired. Not all hardware supports this.345 346- DMA fence workloads and workloads which need page fault handling have347 independent hardware resources to guarantee forward progress. This could be348 achieved through e.g. through dedicated engines and minimal compute unit349 reservations for DMA fence workloads.350 351- The reservation approach could be further refined by only reserving the352 hardware resources for DMA fence workloads when they are in-flight. This must353 cover the time from when the DMA fence is visible to other threads up to354 moment when fence is completed through dma_fence_signal().355 356- As a last resort, if the hardware provides no useful reservation mechanics,357 all workloads must be flushed from the GPU when switching between jobs358 requiring DMA fences or jobs requiring page fault handling: This means all DMA359 fences must complete before a compute job with page fault handling can be360 inserted into the scheduler queue. And vice versa, before a DMA fence can be361 made visible anywhere in the system, all compute workloads must be preempted362 to guarantee all pending GPU page faults are flushed.363 364- Only a fairly theoretical option would be to untangle these dependencies when365 allocating memory to repair hardware page faults, either through separate366 memory blocks or runtime tracking of the full dependency graph of all DMA367 fences. This results very wide impact on the kernel, since resolving the page368 on the CPU side can itself involve a page fault. It is much more feasible and369 robust to limit the impact of handling hardware page faults to the specific370 driver.371 372Note that workloads that run on independent hardware like copy engines or other373GPUs do not have any impact. This allows us to keep using DMA fences internally374in the kernel even for resolving hardware page faults, e.g. by using copy375engines to clear or copy memory needed to resolve the page fault.376 377In some ways this page fault problem is a special case of the `Infinite DMA378Fences` discussions: Infinite fences from compute workloads are allowed to379depend on DMA fences, but not the other way around. And not even the page fault380problem is new, because some other CPU thread in userspace might381hit a page fault which holds up a userspace fence - supporting page faults on382GPUs doesn't anything fundamentally new.383