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1# SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause2# Copyright (C) 2019--2020 Intel Corporation3 4# register rflags5# - f field LSB MSB rflags6# - e enum value # after a field7# - e enum value [LSB MSB]8# - b bool bit9# - l arg name min max elsize [discontig...]10#11# rflags12# 8, 16, 32 register bits (default is 8)13# v1.1 defined in version 1.114# f formula15# float_ireal iReal or IEEE 754; 32 bits16# ireal unsigned iReal17 18# general status registers19module_model_id 0x0000 1620module_revision_number_major 0x0002 821frame_count 0x0005 822pixel_order 0x0006 823- e GRBG 024- e RGGB 125- e BGGR 226- e GBRG 327MIPI_CCS_version 0x0007 828- e v1_0 0x1029- e v1_1 0x1130- f major 4 731- f minor 0 332data_pedestal 0x0008 1633module_manufacturer_id 0x000e 1634module_revision_number_minor 0x0010 835module_date_year 0x0012 836module_date_month 0x0013 837module_date_day 0x0014 838module_date_phase 0x0015 839- f 0 240- e ts 041- e es 142- e cs 243- e mp 344sensor_model_id 0x0016 1645sensor_revision_number 0x0018 846sensor_firmware_version 0x001a 847serial_number 0x001c 3248sensor_manufacturer_id 0x0020 1649sensor_revision_number_16 0x0022 1650 51# frame format description registers52frame_format_model_type 0x0040 853- e 2-byte 154- e 4-byte 255frame_format_model_subtype 0x0041 856- f rows 0 357- f columns 4 758frame_format_descriptor(n) 0x0042 16 f59- l n 0 14 260- f pixels 0 1161- f pcode 12 1562- e embedded 163- e dummy_pixel 264- e black_pixel 365- e dark_pixel 466- e visible_pixel 567- e manuf_specific_0 868- e manuf_specific_1 969- e manuf_specific_2 1070- e manuf_specific_3 1171- e manuf_specific_4 1272- e manuf_specific_5 1373- e manuf_specific_6 1474frame_format_descriptor_4(n) 0x0060 32 f75- l n 0 7 476- f pixels 0 1577- f pcode 28 3178- e embedded 179- e dummy_pixel 280- e black_pixel 381- e dark_pixel 482- e visible_pixel 583- e manuf_specific_0 884- e manuf_specific_1 985- e manuf_specific_2 1086- e manuf_specific_3 1187- e manuf_specific_4 1288- e manuf_specific_5 1389- e manuf_specific_6 1490 91# analog gain description registers92analog_gain_capability 0x0080 1693- e global 094- e alternate_global 295analog_gain_code_min 0x0084 1696analog_gain_code_max 0x0086 1697analog_gain_code_step 0x0088 1698analog_gain_type 0x008a 1699analog_gain_m0 0x008c 16100analog_gain_c0 0x008e 16101analog_gain_m1 0x0090 16102analog_gain_c1 0x0092 16103analog_linear_gain_min 0x0094 16 v1.1104analog_linear_gain_max 0x0096 16 v1.1105analog_linear_gain_step_size 0x0098 16 v1.1106analog_exponential_gain_min 0x009a 16 v1.1107analog_exponential_gain_max 0x009c 16 v1.1108analog_exponential_gain_step_size 0x009e 16 v1.1109 110# data format description registers111data_format_model_type 0x00c0 8112- e normal 1113- e extended 2114data_format_model_subtype 0x00c1 8115- f rows 0 3116- f columns 4 7117data_format_descriptor(n) 0x00c2 16 f118- l n 0 15 2119- f compressed 0 7120- f uncompressed 8 15121 122# general set-up registers123mode_select 0x0100 8124- e software_standby 0125- e streaming 1126image_orientation 0x0101 8127- b horizontal_mirror 0128- b vertical_flip 1129software_reset 0x0103 8130- e off 0131- e on 1132grouped_parameter_hold 0x0104 8133mask_corrupted_frames 0x0105 8134- e allow 0135- e mask 1136fast_standby_ctrl 0x0106 8137- e complete_frames 0138- e frame_truncation 1139CCI_address_ctrl 0x0107 81402nd_CCI_if_ctrl 0x0108 8141- b enable 0142- b ack 11432nd_CCI_address_ctrl 0x0109 8144CSI_channel_identifier 0x0110 8145CSI_signaling_mode 0x0111 8146- e csi_2_dphy 2147- e csi_2_cphy 3148CSI_data_format 0x0112 16149CSI_lane_mode 0x0114 8150DPCM_Frame_DT 0x011d 8151Bottom_embedded_data_DT 0x011e 8152Bottom_embedded_data_VC 0x011f 8153 154gain_mode 0x0120 8155- e global 0156- e alternate 1157ADC_bit_depth 0x0121 8158emb_data_ctrl 0x0122 v1.1159- b raw8_packing_for_raw16 0160- b raw10_packing_for_raw20 1161- b raw12_packing_for_raw24 2162 163GPIO_TRIG_mode 0x0130 8164extclk_frequency_mhz 0x0136 16 ireal165temp_sensor_ctrl 0x0138 8166- b enable 0167temp_sensor_mode 0x0139 8168temp_sensor_output 0x013a 8169 170# integration time registers171fine_integration_time 0x0200 16172coarse_integration_time 0x0202 16173 174# analog gain registers175analog_gain_code_global 0x0204 16176analog_linear_gain_global 0x0206 16 v1.1177analog_exponential_gain_global 0x0208 16 v1.1178 179# digital gain registers180digital_gain_global 0x020e 16181 182# hdr control registers183Short_analog_gain_global 0x0216 16184Short_digital_gain_global 0x0218 16185 186HDR_mode 0x0220 8187- b enabled 0188- b separate_analog_gain 1189- b upscaling 2190- b reset_sync 3191- b timing_mode 4192- b exposure_ctrl_direct 5193- b separate_digital_gain 6194HDR_resolution_reduction 0x0221 8195- f row 0 3196- f column 4 7197Exposure_ratio 0x0222 8198HDR_internal_bit_depth 0x0223 8199Direct_short_integration_time 0x0224 16200Short_analog_linear_gain_global 0x0226 16 v1.1201Short_analog_exponential_gain_global 0x0228 16 v1.1202 203# clock set-up registers204vt_pix_clk_div 0x0300 16205vt_sys_clk_div 0x0302 16206pre_pll_clk_div 0x0304 16207#vt_pre_pll_clk_div 0x0304 16208pll_multiplier 0x0306 16209#vt_pll_multiplier 0x0306 16210op_pix_clk_div 0x0308 16211op_sys_clk_div 0x030a 16212op_pre_pll_clk_div 0x030c 16213op_pll_multiplier 0x030e 16214pll_mode 0x0310 8215- f 0 0216- e single 0217- e dual 1218op_pix_clk_div_rev 0x0312 16 v1.1219op_sys_clk_div_rev 0x0314 16 v1.1220 221# frame timing registers222frame_length_lines 0x0340 16223line_length_pck 0x0342 16224 225# image size registers226x_addr_start 0x0344 16227y_addr_start 0x0346 16228x_addr_end 0x0348 16229y_addr_end 0x034a 16230x_output_size 0x034c 16231y_output_size 0x034e 16232 233# timing mode registers234Frame_length_ctrl 0x0350 8235- b automatic 0236Timing_mode_ctrl 0x0352 8237- b manual_readout 0238- b delayed_exposure 1239Start_readout_rs 0x0353 8240- b manual_readout_start 0241Frame_margin 0x0354 16242 243# sub-sampling registers244x_even_inc 0x0380 16245x_odd_inc 0x0382 16246y_even_inc 0x0384 16247y_odd_inc 0x0386 16248 249# monochrome readout registers250monochrome_en 0x0390 v1.1251- e enabled 0252 253# image scaling registers254Scaling_mode 0x0400 16255- e no_scaling 0256- e horizontal 1257scale_m 0x0404 16258scale_n 0x0406 16259digital_crop_x_offset 0x0408 16260digital_crop_y_offset 0x040a 16261digital_crop_image_width 0x040c 16262digital_crop_image_height 0x040e 16263 264# image compression registers265compression_mode 0x0500 16266- e none 0267- e dpcm_pcm_simple 1268 269# test pattern registers270test_pattern_mode 0x0600 16271- e none 0272- e solid_color 1273- e color_bars 2274- e fade_to_grey 3275- e pn9 4276- e color_tile 5277test_data_red 0x0602 16278test_data_greenR 0x0604 16279test_data_blue 0x0606 16280test_data_greenB 0x0608 16281value_step_size_smooth 0x060a 8282value_step_size_quantised 0x060b 8283 284# phy configuration registers285tclk_post 0x0800 8286ths_prepare 0x0801 8287ths_zero_min 0x0802 8288ths_trail 0x0803 8289tclk_trail_min 0x0804 8290tclk_prepare 0x0805 8291tclk_zero 0x0806 8292tlpx 0x0807 8293phy_ctrl 0x0808 8294- e auto 0295- e UI 1296- e manual 2297tclk_post_ex 0x080a 16298ths_prepare_ex 0x080c 16299ths_zero_min_ex 0x080e 16300ths_trail_ex 0x0810 16301tclk_trail_min_ex 0x0812 16302tclk_prepare_ex 0x0814 16303tclk_zero_ex 0x0816 16304tlpx_ex 0x0818 16305 306# link rate register307requested_link_rate 0x0820 32 u16.16308 309# equalization control registers310DPHY_equalization_mode 0x0824 8 v1.1311- b eq2 0312PHY_equalization_ctrl 0x0825 8 v1.1313- b enable 0314 315# d-phy preamble control registers316DPHY_preamble_ctrl 0x0826 8 v1.1317- b enable 0318DPHY_preamble_length 0x0826 8 v1.1319 320# d-phy spread spectrum control registers321PHY_SSC_ctrl 0x0828 8 v1.1322- b enable 0323 324# manual lp control register325manual_LP_ctrl 0x0829 8 v1.1326- b enable 0327 328# additional phy configuration registers329twakeup 0x082a v1.1330tinit 0x082b v1.1331ths_exit 0x082c v1.1332ths_exit_ex 0x082e 16 v1.1333 334# phy calibration configuration registers335PHY_periodic_calibration_ctrl 0x0830 8336- b frame_blanking 0337PHY_periodic_calibration_interval 0x0831 8338PHY_init_calibration_ctrl 0x0832 8339- b stream_start 0340DPHY_calibration_mode 0x0833 8 v1.1341- b also_alternate 0342CPHY_calibration_mode 0x0834 8 v1.1343- e format_1 0344- e format_2 1345- e format_3 2346t3_calpreamble_length 0x0835 8 v1.1347t3_calpreamble_length_per 0x0836 8 v1.1348t3_calaltseq_length 0x0837 8 v1.1349t3_calaltseq_length_per 0x0838 8 v1.1350FM2_init_seed 0x083a 16 v1.1351t3_caludefseq_length 0x083c 16 v1.1352t3_caludefseq_length_per 0x083e 16 v1.1353 354# c-phy manual control registers355TGR_Preamble_Length 0x0841 8356- b preamable_prog_seq 7357- f begin_preamble_length 0 5358TGR_Post_Length 0x0842 8359- f post_length 0 4360TGR_Preamble_Prog_Sequence(n2) 0x0843361- l n2 0 6 1362- f symbol_n_1 3 5363- f symbol_n 0 2364t3_prepare 0x084e 16365t3_lpx 0x0850 16366 367# alps control register368ALPS_ctrl 0x085a 8369- b lvlp_dphy 0370- b lvlp_cphy 1371- b alp_cphy 2372 373# lrte control registers374TX_REG_CSI_EPD_EN_SSP_cphy 0x0860 16375TX_REG_CSI_EPD_OP_SLP_cphy 0x0862 16376TX_REG_CSI_EPD_EN_SSP_dphy 0x0864 16377TX_REG_CSI_EPD_OP_SLP_dphy 0x0866 16378TX_REG_CSI_EPD_MISC_OPTION_cphy 0x0868 v1.1379TX_REG_CSI_EPD_MISC_OPTION_dphy 0x0869 v1.1380 381# scrambling control registers382Scrambling_ctrl 0x0870383- b enabled 0384- f 2 3385- e 1_seed_cphy 0386- e 4_seed_cphy 3387lane_seed_value(seed, lane) 0x0872 16388- l seed 0 3 0x10389- l lane 0 7 0x2390 391# usl control registers392TX_USL_REV_ENTRY 0x08c0 16 v1.1393TX_USL_REV_Clock_Counter 0x08c2 16 v1.1394TX_USL_REV_LP_Counter 0x08c4 16 v1.1395TX_USL_REV_Frame_Counter 0x08c6 16 v1.1396TX_USL_REV_Chronological_Timer 0x08c8 16 v1.1397TX_USL_FWD_ENTRY 0x08ca 16 v1.1398TX_USL_GPIO 0x08cc 16 v1.1399TX_USL_Operation 0x08ce 16 v1.1400- b reset 0401TX_USL_ALP_ctrl 0x08d0 16 v1.1402- b clock_pause 0403TX_USL_APP_BTA_ACK_TIMEOUT 0x08d2 16 v1.1404TX_USL_SNS_BTA_ACK_TIMEOUT 0x08d2 16 v1.1405USL_Clock_Mode_d_ctrl 0x08d2 v1.1406- b cont_clock_standby 0407- b cont_clock_vblank 1408- b cont_clock_hblank 2409 410# binning configuration registers411binning_mode 0x0900 8412binning_type 0x0901 8413binning_weighting 0x0902 8414 415# data transfer interface registers416data_transfer_if_1_ctrl 0x0a00 8417- b enable 0418- b write 1419- b clear_error 2420data_transfer_if_1_status 0x0a01 8421- b read_if_ready 0422- b write_if_ready 1423- b data_corrupted 2424- b improper_if_usage 3425data_transfer_if_1_page_select 0x0a02 8426data_transfer_if_1_data(p) 0x0a04 8 f427- l p 0 63 1428 429# image processing and sensor correction configuration registers430shading_correction_en 0x0b00 8431- b enable 0432luminance_correction_level 0x0b01 8433green_imbalance_filter_en 0x0b02 8434- b enable 0435mapped_defect_correct_en 0x0b05 8436- b enable 0437single_defect_correct_en 0x0b06 8438- b enable 0439dynamic_couplet_correct_en 0x0b08 8440- b enable 0441combined_defect_correct_en 0x0b0a 8442- b enable 0443module_specific_correction_en 0x0b0c 8444- b enable 0445dynamic_triplet_defect_correct_en 0x0b13 8446- b enable 0447NF_ctrl 0x0b15 8448- b luma 0449- b chroma 1450- b combined 2451 452# optical black pixel readout registers453OB_readout_control 0x0b30 8454- b enable 0455- b interleaving 1456OB_virtual_channel 0x0b31 8457OB_DT 0x0b32 8458OB_data_format 0x0b33 8459 460# color temperature feedback registers461color_temperature 0x0b8c 16462absolute_gain_greenr 0x0b8e 16463absolute_gain_red 0x0b90 16464absolute_gain_blue 0x0b92 16465absolute_gain_greenb 0x0b94 16466 467# cfa conversion registers468CFA_conversion_ctrl 0x0ba0 v1.1469- b bayer_conversion_enable 0470 471# flash strobe and sa strobe control registers472flash_strobe_adjustment 0x0c12 8473flash_strobe_start_point 0x0c14 16474tflash_strobe_delay_rs_ctrl 0x0c16 16475tflash_strobe_width_high_rs_ctrl 0x0c18 16476flash_mode_rs 0x0c1a 8477- b continuous 0478- b truncate 1479- b async 3480flash_trigger_rs 0x0c1b 8481flash_status 0x0c1c 8482- b retimed 0483sa_strobe_mode 0x0c1d 8484- b continuous 0485- b truncate 1486- b async 3487- b adjust_edge 4488sa_strobe_start_point 0x0c1e 16489tsa_strobe_delay_ctrl 0x0c20 16490tsa_strobe_width_ctrl 0x0c22 16491sa_strobe_trigger 0x0c24 8492sa_strobe_status 0x0c25 8493- b retimed 0494tSA_strobe_re_delay_ctrl 0x0c30 16495tSA_strobe_fe_delay_ctrl 0x0c32 16496 497# pdaf control registers498PDAF_ctrl 0x0d00 16499- b enable 0500- b processed 1501- b interleaved 2502- b visible_pdaf_correction 3503PDAF_VC 0x0d02 8504PDAF_DT 0x0d03 8505pd_x_addr_start 0x0d04 16506pd_y_addr_start 0x0d06 16507pd_x_addr_end 0x0d08 16508pd_y_addr_end 0x0d0a 16509 510# bracketing interface configuration registers511bracketing_LUT_ctrl 0x0e00 8512bracketing_LUT_mode 0x0e01 8513- b continue_streaming 0514- b loop_mode 1515bracketing_LUT_entry_ctrl 0x0e02 8516bracketing_LUT_frame(n) 0x0e10 v1.1 f517- l n 0 0xef 1518 519# integration time and gain parameter limit registers520integration_time_capability 0x1000 16521- b fine 0522coarse_integration_time_min 0x1004 16523coarse_integration_time_max_margin 0x1006 16524fine_integration_time_min 0x1008 16525fine_integration_time_max_margin 0x100a 16526 527# digital gain parameter limit registers528digital_gain_capability 0x1081529- e none 0530- e global 2531digital_gain_min 0x1084 16532digital_gain_max 0x1086 16533digital_gain_step_size 0x1088 16534 535# data pedestal capability registers536Pedestal_capability 0x10e0 8 v1.1537 538# adc capability registers539ADC_capability 0x10f0 8540- b bit_depth_ctrl 0541ADC_bit_depth_capability 0x10f4 32 v1.1542 543# video timing parameter limit registers544min_ext_clk_freq_mhz 0x1100 32 float_ireal545max_ext_clk_freq_mhz 0x1104 32 float_ireal546min_pre_pll_clk_div 0x1108 16547# min_vt_pre_pll_clk_div 0x1108 16548max_pre_pll_clk_div 0x110a 16549# max_vt_pre_pll_clk_div 0x110a 16550min_pll_ip_clk_freq_mhz 0x110c 32 float_ireal551# min_vt_pll_ip_clk_freq_mhz 0x110c 32 float_ireal552max_pll_ip_clk_freq_mhz 0x1110 32 float_ireal553# max_vt_pll_ip_clk_freq_mhz 0x1110 32 float_ireal554min_pll_multiplier 0x1114 16555# min_vt_pll_multiplier 0x1114 16556max_pll_multiplier 0x1116 16557# max_vt_pll_multiplier 0x1116 16558min_pll_op_clk_freq_mhz 0x1118 32 float_ireal559max_pll_op_clk_freq_mhz 0x111c 32 float_ireal560 561# video timing set-up capability registers562min_vt_sys_clk_div 0x1120 16563max_vt_sys_clk_div 0x1122 16564min_vt_sys_clk_freq_mhz 0x1124 32 float_ireal565max_vt_sys_clk_freq_mhz 0x1128 32 float_ireal566min_vt_pix_clk_freq_mhz 0x112c 32 float_ireal567max_vt_pix_clk_freq_mhz 0x1130 32 float_ireal568min_vt_pix_clk_div 0x1134 16569max_vt_pix_clk_div 0x1136 16570clock_calculation 0x1138571- b lane_speed 0572- b link_decoupled 1573- b dual_pll_op_sys_ddr 2574- b dual_pll_op_pix_ddr 3575num_of_vt_lanes 0x1139576num_of_op_lanes 0x113a577op_bits_per_lane 0x113b 8 v1.1578 579# frame timing parameter limits580min_frame_length_lines 0x1140 16581max_frame_length_lines 0x1142 16582min_line_length_pck 0x1144 16583max_line_length_pck 0x1146 16584min_line_blanking_pck 0x1148 16585min_frame_blanking_lines 0x114a 16586min_line_length_pck_step_size 0x114c587timing_mode_capability 0x114d588- b auto_frame_length 0589- b rolling_shutter_manual_readout 2590- b delayed_exposure_start 3591- b manual_exposure_embedded_data 4592frame_margin_max_value 0x114e 16593frame_margin_min_value 0x1150594gain_delay_type 0x1151595- e fixed 0596- e variable 1597 598# output clock set-up capability registers599min_op_sys_clk_div 0x1160 16600max_op_sys_clk_div 0x1162 16601min_op_sys_clk_freq_mhz 0x1164 32 float_ireal602max_op_sys_clk_freq_mhz 0x1168 32 float_ireal603min_op_pix_clk_div 0x116c 16604max_op_pix_clk_div 0x116e 16605min_op_pix_clk_freq_mhz 0x1170 32 float_ireal606max_op_pix_clk_freq_mhz 0x1174 32 float_ireal607 608# image size parameter limit registers609x_addr_min 0x1180 16610y_addr_min 0x1182 16611x_addr_max 0x1184 16612y_addr_max 0x1186 16613min_x_output_size 0x1188 16614min_y_output_size 0x118a 16615max_x_output_size 0x118c 16616max_y_output_size 0x118e 16617 618x_addr_start_div_constant 0x1190 v1.1619y_addr_start_div_constant 0x1191 v1.1620x_addr_end_div_constant 0x1192 v1.1621y_addr_end_div_constant 0x1193 v1.1622x_size_div 0x1194 v1.1623y_size_div 0x1195 v1.1624x_output_div 0x1196 v1.1625y_output_div 0x1197 v1.1626non_flexible_resolution_support 0x1198 v1.1627- b new_pix_addr 0628- b new_output_res 1629- b output_crop_no_pad 2630- b output_size_lane_dep 3631 632min_op_pre_pll_clk_div 0x11a0 16633max_op_pre_pll_clk_div 0x11a2 16634min_op_pll_ip_clk_freq_mhz 0x11a4 32 float_ireal635max_op_pll_ip_clk_freq_mhz 0x11a8 32 float_ireal636min_op_pll_multiplier 0x11ac 16637max_op_pll_multiplier 0x11ae 16638min_op_pll_op_clk_freq_mhz 0x11b0 32 float_ireal639max_op_pll_op_clk_freq_mhz 0x11b4 32 float_ireal640clock_tree_pll_capability 0x11b8 8641- b dual_pll 0642- b single_pll 1643- b ext_divider 2644- b flexible_op_pix_clk_div 3645clock_capa_type_capability 0x11b9 v1.1646- b ireal 0647 648# sub-sampling parameters limit registers649min_even_inc 0x11c0 16650min_odd_inc 0x11c2 16651max_even_inc 0x11c4 16652max_odd_inc 0x11c6 16653aux_subsamp_capability 0x11c8 v1.1654- b factor_power_of_2 1655aux_subsamp_mono_capability 0x11c9 v1.1656- b factor_power_of_2 1657monochrome_capability 0x11ca v1.1658- e inc_odd 0659- e inc_even 1660pixel_readout_capability 0x11cb v1.1661- e bayer 0662- e monochrome 1663- e bayer_and_mono 2664min_even_inc_mono 0x11cc 16 v1.1665max_even_inc_mono 0x11ce 16 v1.1666min_odd_inc_mono 0x11d0 16 v1.1667max_odd_inc_mono 0x11d2 16 v1.1668min_even_inc_bc2 0x11d4 16 v1.1669max_even_inc_bc2 0x11d6 16 v1.1670min_odd_inc_bc2 0x11d8 16 v1.1671max_odd_inc_bc2 0x11da 16 v1.1672min_even_inc_mono_bc2 0x11dc 16 v1.1673max_even_inc_mono_bc2 0x11de 16 v1.1674min_odd_inc_mono_bc2 0x11f0 16 v1.1675max_odd_inc_mono_bc2 0x11f2 16 v1.1676 677# image scaling limit parameters678scaling_capability 0x1200 16679- e none 0680- e horizontal 1681- e reserved 2682scaler_m_min 0x1204 16683scaler_m_max 0x1206 16684scaler_n_min 0x1208 16685scaler_n_max 0x120a 16686digital_crop_capability 0x120e687- e none 0688- e input_crop 1689 690# hdr limit registers691hdr_capability_1 0x1210692- b 2x2_binning 0693- b combined_analog_gain 1694- b separate_analog_gain 2695- b upscaling 3696- b reset_sync 4697- b direct_short_exp_timing 5698- b direct_short_exp_synthesis 6699min_hdr_bit_depth 0x1211700hdr_resolution_sub_types 0x1212701hdr_resolution_sub_type(n) 0x1213702- l n 0 1 1703- f row 0 3704- f column 4 7705hdr_capability_2 0x121b706- b combined_digital_gain 0707- b separate_digital_gain 1708- b timing_mode 3709- b synthesis_mode 4710max_hdr_bit_depth 0x121c711 712# usl capability register713usl_support_capability 0x1230 v1.1714- b clock_tree 0715- b rev_clock_tree 1716- b rev_clock_calc 2717usl_clock_mode_d_capability 0x1231 v1.1718- b cont_clock_standby 0719- b cont_clock_vblank 1720- b cont_clock_hblank 2721- b noncont_clock_standby 3722- b noncont_clock_vblank 4723- b noncont_clock_hblank 5724min_op_sys_clk_div_rev 0x1234 v1.1725max_op_sys_clk_div_rev 0x1236 v1.1726min_op_pix_clk_div_rev 0x1238 v1.1727max_op_pix_clk_div_rev 0x123a v1.1728min_op_sys_clk_freq_rev_mhz 0x123c 32 v1.1 float_ireal729max_op_sys_clk_freq_rev_mhz 0x1240 32 v1.1 float_ireal730min_op_pix_clk_freq_rev_mhz 0x1244 32 v1.1 float_ireal731max_op_pix_clk_freq_rev_mhz 0x1248 32 v1.1 float_ireal732max_bitrate_rev_d_mode_mbps 0x124c 32 v1.1 ireal733max_symrate_rev_c_mode_msps 0x1250 32 v1.1 ireal734 735# image compression capability registers736compression_capability 0x1300737- b dpcm_pcm_simple 0738 739# test mode capability registers740test_mode_capability 0x1310 16741- b solid_color 0742- b color_bars 1743- b fade_to_grey 2744- b pn9 3745- b color_tile 5746pn9_data_format1 0x1312747pn9_data_format2 0x1313748pn9_data_format3 0x1314749pn9_data_format4 0x1315750pn9_misc_capability 0x1316751- f num_pixels 0 2752- b compression 3753test_pattern_capability 0x1317 v1.1754- b no_repeat 1755pattern_size_div_m1 0x1318 v1.1756 757# fifo capability registers758fifo_support_capability 0x1502759- e none 0760- e derating 1761- e derating_overrating 2762 763# csi-2 capability registers764phy_ctrl_capability 0x1600765- b auto_phy_ctl 0766- b ui_phy_ctl 1767- b dphy_time_ui_reg_1_ctl 2768- b dphy_time_ui_reg_2_ctl 3769- b dphy_time_ctl 4770- b dphy_ext_time_ui_reg_1_ctl 5771- b dphy_ext_time_ui_reg_2_ctl 6772- b dphy_ext_time_ctl 7773csi_dphy_lane_mode_capability 0x1601774- b 1_lane 0775- b 2_lane 1776- b 3_lane 2777- b 4_lane 3778- b 5_lane 4779- b 6_lane 5780- b 7_lane 6781- b 8_lane 7782csi_signaling_mode_capability 0x1602783- b csi_dphy 2784- b csi_cphy 3785fast_standby_capability 0x1603786- e no_frame_truncation 0787- e frame_truncation 1788csi_address_control_capability 0x1604789- b cci_addr_change 0790- b 2nd_cci_addr 1791- b sw_changeable_2nd_cci_addr 2792data_type_capability 0x1605793- b dpcm_programmable 0794- b bottom_embedded_dt_programmable 1795- b bottom_embedded_vc_programmable 2796- b ext_vc_range 3797csi_cphy_lane_mode_capability 0x1606798- b 1_lane 0799- b 2_lane 1800- b 3_lane 2801- b 4_lane 3802- b 5_lane 4803- b 6_lane 5804- b 7_lane 6805- b 8_lane 7806emb_data_capability 0x1607 v1.1807- b two_bytes_per_raw16 0808- b two_bytes_per_raw20 1809- b two_bytes_per_raw24 2810- b no_one_byte_per_raw16 3811- b no_one_byte_per_raw20 4812- b no_one_byte_per_raw24 5813max_per_lane_bitrate_lane_d_mode_mbps(n) 0x1608 32 ireal814- l n 0 7 4 4,0x32815temp_sensor_capability 0x1618816- b supported 0817- b CCS_format 1818- b reset_0x80 2819max_per_lane_bitrate_lane_c_mode_mbps(n) 0x161a 32 ireal820- l n 0 7 4 4,0x30821dphy_equalization_capability 0x162b822- b equalization_ctrl 0823- b eq1 1824- b eq2 2825cphy_equalization_capability 0x162c826- b equalization_ctrl 0827dphy_preamble_capability 0x162d828- b preamble_seq_ctrl 0829dphy_ssc_capability 0x162e830- b supported 0831cphy_calibration_capability 0x162f832- b manual 0833- b manual_streaming 1834- b format_1_ctrl 2835- b format_2_ctrl 3836- b format_3_ctrl 4837dphy_calibration_capability 0x1630838- b manual 0839- b manual_streaming 1840- b alternate_seq 2841phy_ctrl_capability_2 0x1631842- b tgr_length 0843- b tgr_preamble_prog_seq 1844- b extra_cphy_manual_timing 2845- b clock_based_manual_cdphy 3846- b clock_based_manual_dphy 4847- b clock_based_manual_cphy 5848- b manual_lp_dphy 6849- b manual_lp_cphy 7850lrte_cphy_capability 0x1632851- b pdq_short 0852- b spacer_short 1853- b pdq_long 2854- b spacer_long 3855- b spacer_no_pdq 4856lrte_dphy_capability 0x1633857- b pdq_short_opt1 0858- b spacer_short_opt1 1859- b pdq_long_opt1 2860- b spacer_long_opt1 3861- b spacer_short_opt2 4862- b spacer_long_opt2 5863- b spacer_no_pdq_opt1 6864- b spacer_variable_opt2 7865alps_capability_dphy 0x1634866- e lvlp_not_supported 0 0x3867- e lvlp_supported 1 0x3868- e controllable_lvlp 2 0x3869alps_capability_cphy 0x1635870- e lvlp_not_supported 0 0x3871- e lvlp_supported 1 0x3872- e controllable_lvlp 2 0x3873- e alp_not_supported 0xc 0xc874- e alp_supported 0xd 0xc875- e controllable_alp 0xe 0xc876scrambling_capability 0x1636877- b scrambling_supported 0878- f max_seeds_per_lane_c 1 2879- e 1 0880- e 4 3881- f num_seed_regs 3 5882- e 0 0883- e 1 1884- e 4 4885- b num_seed_per_lane 6886dphy_manual_constant 0x1637887cphy_manual_constant 0x1638888CSI2_interface_capability_misc 0x1639 v1.1889- b eotp_short_pkt_opt2 0890PHY_ctrl_capability_3 0x165c v1.1891- b dphy_timing_not_multiple 0892- b dphy_min_timing_value_1 1893- b twakeup_supported 2894- b tinit_supported 3895- b ths_exit_supported 4896- b cphy_timing_not_multiple 5897- b cphy_min_timing_value_1 6898dphy_sf 0x165d v1.1899cphy_sf 0x165e v1.1900- f twakeup 0 3901- f tinit 4 7902dphy_limits_1 0x165f v1.1903- f ths_prepare 0 3904- f ths_zero 4 7905dphy_limits_2 0x1660 v1.1906- f ths_trail 0 3907- f tclk_trail_min 4 7908dphy_limits_3 0x1661 v1.1909- f tclk_prepare 0 3910- f tclk_zero 4 7911dphy_limits_4 0x1662 v1.1912- f tclk_post 0 3913- f tlpx 4 7914dphy_limits_5 0x1663 v1.1915- f ths_exit 0 3916- f twakeup 4 7917dphy_limits_6 0x1664 v1.1918- f tinit 0 3919cphy_limits_1 0x1665 v1.1920- f t3_prepare_max 0 3921- f t3_lpx_max 4 7922cphy_limits_2 0x1666 v1.1923- f ths_exit_max 0 3924- f twakeup_max 4 7925cphy_limits_3 0x1667 v1.1926- f tinit_max 0 3927 928# binning capability registers929min_frame_length_lines_bin 0x1700 16930max_frame_length_lines_bin 0x1702 16931min_line_length_pck_bin 0x1704 16932max_line_length_pck_bin 0x1706 16933min_line_blanking_pck_bin 0x1708 16934fine_integration_time_min_bin 0x170a 16935fine_integration_time_max_margin_bin 0x170c 16936binning_capability 0x1710937- e unsupported 0938- e binning_then_subsampling 1939- e subsampling_then_binning 2940binning_weighting_capability 0x1711941- b averaged 0942- b summed 1943- b bayer_corrected 2944- b module_specific_weight 3945binning_sub_types 0x1712946binning_sub_type(n) 0x1713947- l n 0 63 1948- f row 0 3949- f column 4 7950binning_weighting_mono_capability 0x1771 v1.1951- b averaged 0952- b summed 1953- b bayer_corrected 2954- b module_specific_weight 3955binning_sub_types_mono 0x1772 v1.1956binning_sub_type_mono(n) 0x1773 v1.1 f957- l n 0 63 1958 959# data transfer interface capability registers960data_transfer_if_capability 0x1800961- b supported 0962- b polling 2963 964# sensor correction capability registers965shading_correction_capability 0x1900966- b color_shading 0967- b luminance_correction 1968green_imbalance_capability 0x1901969- b supported 0970module_specific_correction_capability 0x1903971defect_correction_capability 0x1904 16972- b mapped_defect 0973- b dynamic_couplet 2974- b dynamic_single 5975- b combined_dynamic 8976defect_correction_capability_2 0x1906 16977- b dynamic_triplet 3978nf_capability 0x1908979- b luma 0980- b chroma 1981- b combined 2982 983# optical black readout capability registers984ob_readout_capability 0x1980985- b controllable_readout 0986- b visible_pixel_readout 1987- b different_vc_readout 2988- b different_dt_readout 3989- b prog_data_format 4990 991# color feedback capability registers992color_feedback_capability 0x1987993- b kelvin 0994- b awb_gain 1995 996# cfa pattern capability registers997CFA_pattern_capability 0x1990 v1.1998- e bayer 0999- e monochrome 11000- e 4x4_quad_bayer 21001- e vendor_specific 31002CFA_pattern_conversion_capability 0x1991 v1.11003- b bayer 01004 1005# timer capability registers1006flash_mode_capability 0x1a021007- b single_strobe 01008sa_strobe_mode_capability 0x1a031009- b fixed_width 01010- b edge_ctrl 11011 1012# soft reset capability registers1013reset_max_delay 0x1a10 v1.11014reset_min_time 0x1a11 v1.11015 1016# pdaf capability registers1017pdaf_capability_1 0x1b801018- b supported 01019- b processed_bottom_embedded 11020- b processed_interleaved 21021- b raw_bottom_embedded 31022- b raw_interleaved 41023- b visible_pdaf_correction 51024- b vc_interleaving 61025- b dt_interleaving 71026pdaf_capability_2 0x1b811027- b ROI 01028- b after_digital_crop 11029- b ctrl_retimed 21030 1031# bracketing interface capability registers1032bracketing_lut_capability_1 0x1c001033- b coarse_integration 01034- b global_analog_gain 11035- b flash 41036- b global_digital_gain 51037- b alternate_global_analog_gain 61038bracketing_lut_capability_2 0x1c011039- b single_bracketing_mode 01040- b looped_bracketing_mode 11041bracketing_lut_size 0x1c021042