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1.. SPDX-License-Identifier: GPL-2.02 3========================================4GPMC (General Purpose Memory Controller)5========================================6 7GPMC is an unified memory controller dedicated to interfacing external8memory devices like9 10 * Asynchronous SRAM like memories and application specific integrated11 circuit devices.12 * Asynchronous, synchronous, and page mode burst NOR flash devices13 NAND flash14 * Pseudo-SRAM devices15 16GPMC is found on Texas Instruments SoC's (OMAP based)17IP details: https://www.ti.com/lit/pdf/spruh73 section 7.118 19 20GPMC generic timing calculation:21================================22 23GPMC has certain timings that has to be programmed for proper24functioning of the peripheral, while peripheral has another set of25timings. To have peripheral work with gpmc, peripheral timings has to26be translated to the form gpmc can understand. The way it has to be27translated depends on the connected peripheral. Also there is a28dependency for certain gpmc timings on gpmc clock frequency. Hence a29generic timing routine was developed to achieve above requirements.30 31Generic routine provides a generic method to calculate gpmc timings32from gpmc peripheral timings. struct gpmc_device_timings fields has to33be updated with timings from the datasheet of the peripheral that is34connected to gpmc. A few of the peripheral timings can be fed either35in time or in cycles, provision to handle this scenario has been36provided (refer struct gpmc_device_timings definition). It may so37happen that timing as specified by peripheral datasheet is not present38in timing structure, in this scenario, try to correlate peripheral39timing to the one available. If that doesn't work, try to add a new40field as required by peripheral, educate generic timing routine to41handle it, make sure that it does not break any of the existing.42Then there may be cases where peripheral datasheet doesn't mention43certain fields of struct gpmc_device_timings, zero those entries.44 45Generic timing routine has been verified to work properly on46multiple onenand's and tusb6010 peripherals.47 48A word of caution: generic timing routine has been developed based49on understanding of gpmc timings, peripheral timings, available50custom timing routines, a kind of reverse engineering without51most of the datasheets & hardware (to be exact none of those supported52in mainline having custom timing routine) and by simulation.53 54gpmc timing dependency on peripheral timings:55 56[<gpmc_timing>: <peripheral timing1>, <peripheral timing2> ...]57 581. common59 60cs_on:61 t_ceasu62adv_on:63 t_avdasu, t_ceavd64 652. sync common66 67sync_clk:68 clk69page_burst_access:70 t_bacc71clk_activation:72 t_ces, t_avds73 743. read async muxed75 76adv_rd_off:77 t_avdp_r78oe_on:79 t_oeasu, t_aavdh80access:81 t_iaa, t_oe, t_ce, t_aa82rd_cycle:83 t_rd_cycle, t_cez_r, t_oez84 854. read async non-muxed86 87adv_rd_off:88 t_avdp_r89oe_on:90 t_oeasu91access:92 t_iaa, t_oe, t_ce, t_aa93rd_cycle:94 t_rd_cycle, t_cez_r, t_oez95 965. read sync muxed97 98adv_rd_off:99 t_avdp_r, t_avdh100oe_on:101 t_oeasu, t_ach, cyc_aavdh_oe102access:103 t_iaa, cyc_iaa, cyc_oe104rd_cycle:105 t_cez_r, t_oez, t_ce_rdyz106 1076. read sync non-muxed108 109adv_rd_off:110 t_avdp_r111oe_on:112 t_oeasu113access:114 t_iaa, cyc_iaa, cyc_oe115rd_cycle:116 t_cez_r, t_oez, t_ce_rdyz117 1187. write async muxed119 120adv_wr_off:121 t_avdp_w122we_on, wr_data_mux_bus:123 t_weasu, t_aavdh, cyc_aavhd_we124we_off:125 t_wpl126cs_wr_off:127 t_wph128wr_cycle:129 t_cez_w, t_wr_cycle130 1318. write async non-muxed132 133adv_wr_off:134 t_avdp_w135we_on, wr_data_mux_bus:136 t_weasu137we_off:138 t_wpl139cs_wr_off:140 t_wph141wr_cycle:142 t_cez_w, t_wr_cycle143 1449. write sync muxed145 146adv_wr_off:147 t_avdp_w, t_avdh148we_on, wr_data_mux_bus:149 t_weasu, t_rdyo, t_aavdh, cyc_aavhd_we150we_off:151 t_wpl, cyc_wpl152cs_wr_off:153 t_wph154wr_cycle:155 t_cez_w, t_ce_rdyz156 15710. write sync non-muxed158 159adv_wr_off:160 t_avdp_w161we_on, wr_data_mux_bus:162 t_weasu, t_rdyo163we_off:164 t_wpl, cyc_wpl165cs_wr_off:166 t_wph167wr_cycle:168 t_cez_w, t_ce_rdyz169 170 171Note:172 Many of gpmc timings are dependent on other gpmc timings (a few173 gpmc timings purely dependent on other gpmc timings, a reason that174 some of the gpmc timings are missing above), and it will result in175 indirect dependency of peripheral timings to gpmc timings other than176 mentioned above, refer timing routine for more details. To know what177 these peripheral timings correspond to, please see explanations in178 struct gpmc_device_timings definition. And for gpmc timings refer179 IP details (link above).180