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1=====================================2MTD NAND Driver Programming Interface3=====================================4 5:Author: Thomas Gleixner6 7Introduction8============9 10The generic NAND driver supports almost all NAND and AG-AND based chips11and connects them to the Memory Technology Devices (MTD) subsystem of12the Linux Kernel.13 14This documentation is provided for developers who want to implement15board drivers or filesystem drivers suitable for NAND devices.16 17Known Bugs And Assumptions18==========================19 20None.21 22Documentation hints23===================24 25The function and structure docs are autogenerated. Each function and26struct member has a short description which is marked with an [XXX]27identifier. The following chapters explain the meaning of those28identifiers.29 30Function identifiers [XXX]31--------------------------32 33The functions are marked with [XXX] identifiers in the short comment.34The identifiers explain the usage and scope of the functions. Following35identifiers are used:36 37- [MTD Interface]38 39 These functions provide the interface to the MTD kernel API. They are40 not replaceable and provide functionality which is complete hardware41 independent.42 43- [NAND Interface]44 45 These functions are exported and provide the interface to the NAND46 kernel API.47 48- [GENERIC]49 50 Generic functions are not replaceable and provide functionality which51 is complete hardware independent.52 53- [DEFAULT]54 55 Default functions provide hardware related functionality which is56 suitable for most of the implementations. These functions can be57 replaced by the board driver if necessary. Those functions are called58 via pointers in the NAND chip description structure. The board driver59 can set the functions which should be replaced by board dependent60 functions before calling nand_scan(). If the function pointer is61 NULL on entry to nand_scan() then the pointer is set to the default62 function which is suitable for the detected chip type.63 64Struct member identifiers [XXX]65-------------------------------66 67The struct members are marked with [XXX] identifiers in the comment. The68identifiers explain the usage and scope of the members. Following69identifiers are used:70 71- [INTERN]72 73 These members are for NAND driver internal use only and must not be74 modified. Most of these values are calculated from the chip geometry75 information which is evaluated during nand_scan().76 77- [REPLACEABLE]78 79 Replaceable members hold hardware related functions which can be80 provided by the board driver. The board driver can set the functions81 which should be replaced by board dependent functions before calling82 nand_scan(). If the function pointer is NULL on entry to83 nand_scan() then the pointer is set to the default function which is84 suitable for the detected chip type.85 86- [BOARDSPECIFIC]87 88 Board specific members hold hardware related information which must89 be provided by the board driver. The board driver must set the90 function pointers and datafields before calling nand_scan().91 92- [OPTIONAL]93 94 Optional members can hold information relevant for the board driver.95 The generic NAND driver code does not use this information.96 97Basic board driver98==================99 100For most boards it will be sufficient to provide just the basic101functions and fill out some really board dependent members in the nand102chip description structure.103 104Basic defines105-------------106 107At least you have to provide a nand_chip structure and a storage for108the ioremap'ed chip address. You can allocate the nand_chip structure109using kmalloc or you can allocate it statically. The NAND chip structure110embeds an mtd structure which will be registered to the MTD subsystem.111You can extract a pointer to the mtd structure from a nand_chip pointer112using the nand_to_mtd() helper.113 114Kmalloc based example115 116::117 118 static struct mtd_info *board_mtd;119 static void __iomem *baseaddr;120 121 122Static example123 124::125 126 static struct nand_chip board_chip;127 static void __iomem *baseaddr;128 129 130Partition defines131-----------------132 133If you want to divide your device into partitions, then define a134partitioning scheme suitable to your board.135 136::137 138 #define NUM_PARTITIONS 2139 static struct mtd_partition partition_info[] = {140 { .name = "Flash partition 1",141 .offset = 0,142 .size = 8 * 1024 * 1024 },143 { .name = "Flash partition 2",144 .offset = MTDPART_OFS_NEXT,145 .size = MTDPART_SIZ_FULL },146 };147 148 149Hardware control function150-------------------------151 152The hardware control function provides access to the control pins of the153NAND chip(s). The access can be done by GPIO pins or by address lines.154If you use address lines, make sure that the timing requirements are155met.156 157*GPIO based example*158 159::160 161 static void board_hwcontrol(struct mtd_info *mtd, int cmd)162 {163 switch(cmd){164 case NAND_CTL_SETCLE: /* Set CLE pin high */ break;165 case NAND_CTL_CLRCLE: /* Set CLE pin low */ break;166 case NAND_CTL_SETALE: /* Set ALE pin high */ break;167 case NAND_CTL_CLRALE: /* Set ALE pin low */ break;168 case NAND_CTL_SETNCE: /* Set nCE pin low */ break;169 case NAND_CTL_CLRNCE: /* Set nCE pin high */ break;170 }171 }172 173 174*Address lines based example.* It's assumed that the nCE pin is driven175by a chip select decoder.176 177::178 179 static void board_hwcontrol(struct mtd_info *mtd, int cmd)180 {181 struct nand_chip *this = mtd_to_nand(mtd);182 switch(cmd){183 case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT; break;184 case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break;185 case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT; break;186 case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break;187 }188 }189 190 191Device ready function192---------------------193 194If the hardware interface has the ready busy pin of the NAND chip195connected to a GPIO or other accessible I/O pin, this function is used196to read back the state of the pin. The function has no arguments and197should return 0, if the device is busy (R/B pin is low) and 1, if the198device is ready (R/B pin is high). If the hardware interface does not199give access to the ready busy pin, then the function must not be defined200and the function pointer this->legacy.dev_ready is set to NULL.201 202Init function203-------------204 205The init function allocates memory and sets up all the board specific206parameters and function pointers. When everything is set up nand_scan()207is called. This function tries to detect and identify then chip. If a208chip is found all the internal data fields are initialized accordingly.209The structure(s) have to be zeroed out first and then filled with the210necessary information about the device.211 212::213 214 static int __init board_init (void)215 {216 struct nand_chip *this;217 int err = 0;218 219 /* Allocate memory for MTD device structure and private data */220 this = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);221 if (!this) {222 printk ("Unable to allocate NAND MTD device structure.\n");223 err = -ENOMEM;224 goto out;225 }226 227 board_mtd = nand_to_mtd(this);228 229 /* map physical address */230 baseaddr = ioremap(CHIP_PHYSICAL_ADDRESS, 1024);231 if (!baseaddr) {232 printk("Ioremap to access NAND chip failed\n");233 err = -EIO;234 goto out_mtd;235 }236 237 /* Set address of NAND IO lines */238 this->legacy.IO_ADDR_R = baseaddr;239 this->legacy.IO_ADDR_W = baseaddr;240 /* Reference hardware control function */241 this->hwcontrol = board_hwcontrol;242 /* Set command delay time, see datasheet for correct value */243 this->legacy.chip_delay = CHIP_DEPENDEND_COMMAND_DELAY;244 /* Assign the device ready function, if available */245 this->legacy.dev_ready = board_dev_ready;246 this->eccmode = NAND_ECC_SOFT;247 248 /* Scan to find existence of the device */249 if (nand_scan (this, 1)) {250 err = -ENXIO;251 goto out_ior;252 }253 254 add_mtd_partitions(board_mtd, partition_info, NUM_PARTITIONS);255 goto out;256 257 out_ior:258 iounmap(baseaddr);259 out_mtd:260 kfree (this);261 out:262 return err;263 }264 module_init(board_init);265 266 267Exit function268-------------269 270The exit function is only necessary if the driver is compiled as a271module. It releases all resources which are held by the chip driver and272unregisters the partitions in the MTD layer.273 274::275 276 #ifdef MODULE277 static void __exit board_cleanup (void)278 {279 /* Unregister device */280 WARN_ON(mtd_device_unregister(board_mtd));281 /* Release resources */282 nand_cleanup(mtd_to_nand(board_mtd));283 284 /* unmap physical address */285 iounmap(baseaddr);286 287 /* Free the MTD device structure */288 kfree (mtd_to_nand(board_mtd));289 }290 module_exit(board_cleanup);291 #endif292 293 294Advanced board driver functions295===============================296 297This chapter describes the advanced functionality of the NAND driver.298For a list of functions which can be overridden by the board driver see299the documentation of the nand_chip structure.300 301Multiple chip control302---------------------303 304The nand driver can control chip arrays. Therefore the board driver must305provide an own select_chip function. This function must (de)select the306requested chip. The function pointer in the nand_chip structure must be307set before calling nand_scan(). The maxchip parameter of nand_scan()308defines the maximum number of chips to scan for. Make sure that the309select_chip function can handle the requested number of chips.310 311The nand driver concatenates the chips to one virtual chip and provides312this virtual chip to the MTD layer.313 314*Note: The driver can only handle linear chip arrays of equally sized315chips. There is no support for parallel arrays which extend the316buswidth.*317 318*GPIO based example*319 320::321 322 static void board_select_chip (struct mtd_info *mtd, int chip)323 {324 /* Deselect all chips, set all nCE pins high */325 GPIO(BOARD_NAND_NCE) |= 0xff;326 if (chip >= 0)327 GPIO(BOARD_NAND_NCE) &= ~ (1 << chip);328 }329 330 331*Address lines based example.* Its assumed that the nCE pins are332connected to an address decoder.333 334::335 336 static void board_select_chip (struct mtd_info *mtd, int chip)337 {338 struct nand_chip *this = mtd_to_nand(mtd);339 340 /* Deselect all chips */341 this->legacy.IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK;342 this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;343 switch (chip) {344 case 0:345 this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;346 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;347 break;348 ....349 case n:350 this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;351 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;352 break;353 }354 }355 356 357Hardware ECC support358--------------------359 360Functions and constants361~~~~~~~~~~~~~~~~~~~~~~~362 363The nand driver supports three different types of hardware ECC.364 365- NAND_ECC_HW3_256366 367 Hardware ECC generator providing 3 bytes ECC per 256 byte.368 369- NAND_ECC_HW3_512370 371 Hardware ECC generator providing 3 bytes ECC per 512 byte.372 373- NAND_ECC_HW6_512374 375 Hardware ECC generator providing 6 bytes ECC per 512 byte.376 377- NAND_ECC_HW8_512378 379 Hardware ECC generator providing 8 bytes ECC per 512 byte.380 381If your hardware generator has a different functionality add it at the382appropriate place in nand_base.c383 384The board driver must provide following functions:385 386- enable_hwecc387 388 This function is called before reading / writing to the chip. Reset389 or initialize the hardware generator in this function. The function390 is called with an argument which let you distinguish between read and391 write operations.392 393- calculate_ecc394 395 This function is called after read / write from / to the chip.396 Transfer the ECC from the hardware to the buffer. If the option397 NAND_HWECC_SYNDROME is set then the function is only called on398 write. See below.399 400- correct_data401 402 In case of an ECC error this function is called for error detection403 and correction. Return 1 respectively 2 in case the error can be404 corrected. If the error is not correctable return -1. If your405 hardware generator matches the default algorithm of the nand_ecc406 software generator then use the correction function provided by407 nand_ecc instead of implementing duplicated code.408 409Hardware ECC with syndrome calculation410~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~411 412Many hardware ECC implementations provide Reed-Solomon codes and413calculate an error syndrome on read. The syndrome must be converted to a414standard Reed-Solomon syndrome before calling the error correction code415in the generic Reed-Solomon library.416 417The ECC bytes must be placed immediately after the data bytes in order418to make the syndrome generator work. This is contrary to the usual419layout used by software ECC. The separation of data and out of band area420is not longer possible. The nand driver code handles this layout and the421remaining free bytes in the oob area are managed by the autoplacement422code. Provide a matching oob-layout in this case. See rts_from4.c and423diskonchip.c for implementation reference. In those cases we must also424use bad block tables on FLASH, because the ECC layout is interfering425with the bad block marker positions. See bad block table support for426details.427 428Bad block table support429-----------------------430 431Most NAND chips mark the bad blocks at a defined position in the spare432area. Those blocks must not be erased under any circumstances as the bad433block information would be lost. It is possible to check the bad block434mark each time when the blocks are accessed by reading the spare area of435the first page in the block. This is time consuming so a bad block table436is used.437 438The nand driver supports various types of bad block tables.439 440- Per device441 442 The bad block table contains all bad block information of the device443 which can consist of multiple chips.444 445- Per chip446 447 A bad block table is used per chip and contains the bad block448 information for this particular chip.449 450- Fixed offset451 452 The bad block table is located at a fixed offset in the chip453 (device). This applies to various DiskOnChip devices.454 455- Automatic placed456 457 The bad block table is automatically placed and detected either at458 the end or at the beginning of a chip (device)459 460- Mirrored tables461 462 The bad block table is mirrored on the chip (device) to allow updates463 of the bad block table without data loss.464 465nand_scan() calls the function nand_default_bbt().466nand_default_bbt() selects appropriate default bad block table467descriptors depending on the chip information which was retrieved by468nand_scan().469 470The standard policy is scanning the device for bad blocks and build a471ram based bad block table which allows faster access than always472checking the bad block information on the flash chip itself.473 474Flash based tables475~~~~~~~~~~~~~~~~~~476 477It may be desired or necessary to keep a bad block table in FLASH. For478AG-AND chips this is mandatory, as they have no factory marked bad479blocks. They have factory marked good blocks. The marker pattern is480erased when the block is erased to be reused. So in case of powerloss481before writing the pattern back to the chip this block would be lost and482added to the bad blocks. Therefore we scan the chip(s) when we detect483them the first time for good blocks and store this information in a bad484block table before erasing any of the blocks.485 486The blocks in which the tables are stored are protected against487accidental access by marking them bad in the memory bad block table. The488bad block table management functions are allowed to circumvent this489protection.490 491The simplest way to activate the FLASH based bad block table support is492to set the option NAND_BBT_USE_FLASH in the bbt_option field of the493nand chip structure before calling nand_scan(). For AG-AND chips is494this done by default. This activates the default FLASH based bad block495table functionality of the NAND driver. The default bad block table496options are497 498- Store bad block table per chip499 500- Use 2 bits per block501 502- Automatic placement at the end of the chip503 504- Use mirrored tables with version numbers505 506- Reserve 4 blocks at the end of the chip507 508User defined tables509~~~~~~~~~~~~~~~~~~~510 511User defined tables are created by filling out a nand_bbt_descr512structure and storing the pointer in the nand_chip structure member513bbt_td before calling nand_scan(). If a mirror table is necessary a514second structure must be created and a pointer to this structure must be515stored in bbt_md inside the nand_chip structure. If the bbt_md member516is set to NULL then only the main table is used and no scan for the517mirrored table is performed.518 519The most important field in the nand_bbt_descr structure is the520options field. The options define most of the table properties. Use the521predefined constants from rawnand.h to define the options.522 523- Number of bits per block524 525 The supported number of bits is 1, 2, 4, 8.526 527- Table per chip528 529 Setting the constant NAND_BBT_PERCHIP selects that a bad block530 table is managed for each chip in a chip array. If this option is not531 set then a per device bad block table is used.532 533- Table location is absolute534 535 Use the option constant NAND_BBT_ABSPAGE and define the absolute536 page number where the bad block table starts in the field pages. If537 you have selected bad block tables per chip and you have a multi chip538 array then the start page must be given for each chip in the chip539 array. Note: there is no scan for a table ident pattern performed, so540 the fields pattern, veroffs, offs, len can be left uninitialized541 542- Table location is automatically detected543 544 The table can either be located in the first or the last good blocks545 of the chip (device). Set NAND_BBT_LASTBLOCK to place the bad block546 table at the end of the chip (device). The bad block tables are547 marked and identified by a pattern which is stored in the spare area548 of the first page in the block which holds the bad block table. Store549 a pointer to the pattern in the pattern field. Further the length of550 the pattern has to be stored in len and the offset in the spare area551 must be given in the offs member of the nand_bbt_descr structure.552 For mirrored bad block tables different patterns are mandatory.553 554- Table creation555 556 Set the option NAND_BBT_CREATE to enable the table creation if no557 table can be found during the scan. Usually this is done only once if558 a new chip is found.559 560- Table write support561 562 Set the option NAND_BBT_WRITE to enable the table write support.563 This allows the update of the bad block table(s) in case a block has564 to be marked bad due to wear. The MTD interface function565 block_markbad is calling the update function of the bad block table.566 If the write support is enabled then the table is updated on FLASH.567 568 Note: Write support should only be enabled for mirrored tables with569 version control.570 571- Table version control572 573 Set the option NAND_BBT_VERSION to enable the table version574 control. It's highly recommended to enable this for mirrored tables575 with write support. It makes sure that the risk of losing the bad576 block table information is reduced to the loss of the information577 about the one worn out block which should be marked bad. The version578 is stored in 4 consecutive bytes in the spare area of the device. The579 position of the version number is defined by the member veroffs in580 the bad block table descriptor.581 582- Save block contents on write583 584 In case that the block which holds the bad block table does contain585 other useful information, set the option NAND_BBT_SAVECONTENT. When586 the bad block table is written then the whole block is read the bad587 block table is updated and the block is erased and everything is588 written back. If this option is not set only the bad block table is589 written and everything else in the block is ignored and erased.590 591- Number of reserved blocks592 593 For automatic placement some blocks must be reserved for bad block594 table storage. The number of reserved blocks is defined in the595 maxblocks member of the bad block table description structure.596 Reserving 4 blocks for mirrored tables should be a reasonable number.597 This also limits the number of blocks which are scanned for the bad598 block table ident pattern.599 600Spare area (auto)placement601--------------------------602 603The nand driver implements different possibilities for placement of604filesystem data in the spare area,605 606- Placement defined by fs driver607 608- Automatic placement609 610The default placement function is automatic placement. The nand driver611has built in default placement schemes for the various chiptypes. If due612to hardware ECC functionality the default placement does not fit then613the board driver can provide a own placement scheme.614 615File system drivers can provide a own placement scheme which is used616instead of the default placement scheme.617 618Placement schemes are defined by a nand_oobinfo structure619 620::621 622 struct nand_oobinfo {623 int useecc;624 int eccbytes;625 int eccpos[24];626 int oobfree[8][2];627 };628 629 630- useecc631 632 The useecc member controls the ecc and placement function. The header633 file include/mtd/mtd-abi.h contains constants to select ecc and634 placement. MTD_NANDECC_OFF switches off the ecc complete. This is635 not recommended and available for testing and diagnosis only.636 MTD_NANDECC_PLACE selects caller defined placement,637 MTD_NANDECC_AUTOPLACE selects automatic placement.638 639- eccbytes640 641 The eccbytes member defines the number of ecc bytes per page.642 643- eccpos644 645 The eccpos array holds the byte offsets in the spare area where the646 ecc codes are placed.647 648- oobfree649 650 The oobfree array defines the areas in the spare area which can be651 used for automatic placement. The information is given in the format652 {offset, size}. offset defines the start of the usable area, size the653 length in bytes. More than one area can be defined. The list is654 terminated by an {0, 0} entry.655 656Placement defined by fs driver657~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~658 659The calling function provides a pointer to a nand_oobinfo structure660which defines the ecc placement. For writes the caller must provide a661spare area buffer along with the data buffer. The spare area buffer size662is (number of pages) \* (size of spare area). For reads the buffer size663is (number of pages) \* ((size of spare area) + (number of ecc steps per664page) \* sizeof (int)). The driver stores the result of the ecc check665for each tuple in the spare buffer. The storage sequence is::666 667 <spare data page 0><ecc result 0>...<ecc result n>668 669 ...670 671 <spare data page n><ecc result 0>...<ecc result n>672 673This is a legacy mode used by YAFFS1.674 675If the spare area buffer is NULL then only the ECC placement is done676according to the given scheme in the nand_oobinfo structure.677 678Automatic placement679~~~~~~~~~~~~~~~~~~~680 681Automatic placement uses the built in defaults to place the ecc bytes in682the spare area. If filesystem data have to be stored / read into the683spare area then the calling function must provide a buffer. The buffer684size per page is determined by the oobfree array in the nand_oobinfo685structure.686 687If the spare area buffer is NULL then only the ECC placement is done688according to the default builtin scheme.689 690Spare area autoplacement default schemes691----------------------------------------692 693256 byte pagesize694~~~~~~~~~~~~~~~~~695 696======== ================== ===================================================697Offset Content Comment698======== ================== ===================================================6990x00 ECC byte 0 Error correction code byte 07000x01 ECC byte 1 Error correction code byte 17010x02 ECC byte 2 Error correction code byte 27020x03 Autoplace 07030x04 Autoplace 17040x05 Bad block marker If any bit in this byte is zero, then this705 block is bad. This applies only to the first706 page in a block. In the remaining pages this707 byte is reserved7080x06 Autoplace 27090x07 Autoplace 3710======== ================== ===================================================711 712512 byte pagesize713~~~~~~~~~~~~~~~~~714 715 716============= ================== ==============================================717Offset Content Comment718============= ================== ==============================================7190x00 ECC byte 0 Error correction code byte 0 of the lower720 256 Byte data in this page7210x01 ECC byte 1 Error correction code byte 1 of the lower722 256 Bytes of data in this page7230x02 ECC byte 2 Error correction code byte 2 of the lower724 256 Bytes of data in this page7250x03 ECC byte 3 Error correction code byte 0 of the upper726 256 Bytes of data in this page7270x04 reserved reserved7280x05 Bad block marker If any bit in this byte is zero, then this729 block is bad. This applies only to the first730 page in a block. In the remaining pages this731 byte is reserved7320x06 ECC byte 4 Error correction code byte 1 of the upper733 256 Bytes of data in this page7340x07 ECC byte 5 Error correction code byte 2 of the upper735 256 Bytes of data in this page7360x08 - 0x0F Autoplace 0 - 7737============= ================== ==============================================738 7392048 byte pagesize740~~~~~~~~~~~~~~~~~~741 742=========== ================== ================================================743Offset Content Comment744=========== ================== ================================================7450x00 Bad block marker If any bit in this byte is zero, then this block746 is bad. This applies only to the first page in a747 block. In the remaining pages this byte is748 reserved7490x01 Reserved Reserved7500x02-0x27 Autoplace 0 - 377510x28 ECC byte 0 Error correction code byte 0 of the first752 256 Byte data in this page7530x29 ECC byte 1 Error correction code byte 1 of the first754 256 Bytes of data in this page7550x2A ECC byte 2 Error correction code byte 2 of the first756 256 Bytes data in this page7570x2B ECC byte 3 Error correction code byte 0 of the second758 256 Bytes of data in this page7590x2C ECC byte 4 Error correction code byte 1 of the second760 256 Bytes of data in this page7610x2D ECC byte 5 Error correction code byte 2 of the second762 256 Bytes of data in this page7630x2E ECC byte 6 Error correction code byte 0 of the third764 256 Bytes of data in this page7650x2F ECC byte 7 Error correction code byte 1 of the third766 256 Bytes of data in this page7670x30 ECC byte 8 Error correction code byte 2 of the third768 256 Bytes of data in this page7690x31 ECC byte 9 Error correction code byte 0 of the fourth770 256 Bytes of data in this page7710x32 ECC byte 10 Error correction code byte 1 of the fourth772 256 Bytes of data in this page7730x33 ECC byte 11 Error correction code byte 2 of the fourth774 256 Bytes of data in this page7750x34 ECC byte 12 Error correction code byte 0 of the fifth776 256 Bytes of data in this page7770x35 ECC byte 13 Error correction code byte 1 of the fifth778 256 Bytes of data in this page7790x36 ECC byte 14 Error correction code byte 2 of the fifth780 256 Bytes of data in this page7810x37 ECC byte 15 Error correction code byte 0 of the sixth782 256 Bytes of data in this page7830x38 ECC byte 16 Error correction code byte 1 of the sixth784 256 Bytes of data in this page7850x39 ECC byte 17 Error correction code byte 2 of the sixth786 256 Bytes of data in this page7870x3A ECC byte 18 Error correction code byte 0 of the seventh788 256 Bytes of data in this page7890x3B ECC byte 19 Error correction code byte 1 of the seventh790 256 Bytes of data in this page7910x3C ECC byte 20 Error correction code byte 2 of the seventh792 256 Bytes of data in this page7930x3D ECC byte 21 Error correction code byte 0 of the eighth794 256 Bytes of data in this page7950x3E ECC byte 22 Error correction code byte 1 of the eighth796 256 Bytes of data in this page7970x3F ECC byte 23 Error correction code byte 2 of the eighth798 256 Bytes of data in this page799=========== ================== ================================================800 801Filesystem support802==================803 804The NAND driver provides all necessary functions for a filesystem via805the MTD interface.806 807Filesystems must be aware of the NAND peculiarities and restrictions.808One major restrictions of NAND Flash is, that you cannot write as often809as you want to a page. The consecutive writes to a page, before erasing810it again, are restricted to 1-3 writes, depending on the manufacturers811specifications. This applies similar to the spare area.812 813Therefore NAND aware filesystems must either write in page size chunks814or hold a writebuffer to collect smaller writes until they sum up to815pagesize. Available NAND aware filesystems: JFFS2, YAFFS.816 817The spare area usage to store filesystem data is controlled by the spare818area placement functionality which is described in one of the earlier819chapters.820 821Tools822=====823 824The MTD project provides a couple of helpful tools to handle NAND Flash.825 826- flasherase, flasheraseall: Erase and format FLASH partitions827 828- nandwrite: write filesystem images to NAND FLASH829 830- nanddump: dump the contents of a NAND FLASH partitions831 832These tools are aware of the NAND restrictions. Please use those tools833instead of complaining about errors which are caused by non NAND aware834access methods.835 836Constants837=========838 839This chapter describes the constants which might be relevant for a840driver developer.841 842Chip option constants843---------------------844 845Constants for chip id table846~~~~~~~~~~~~~~~~~~~~~~~~~~~847 848These constants are defined in rawnand.h. They are OR-ed together to849describe the chip functionality::850 851 /* Buswitdh is 16 bit */852 #define NAND_BUSWIDTH_16 0x00000002853 /* Device supports partial programming without padding */854 #define NAND_NO_PADDING 0x00000004855 /* Chip has cache program function */856 #define NAND_CACHEPRG 0x00000008857 /* Chip has copy back function */858 #define NAND_COPYBACK 0x00000010859 /* AND Chip which has 4 banks and a confusing page / block860 * assignment. See Renesas datasheet for further information */861 #define NAND_IS_AND 0x00000020862 /* Chip has a array of 4 pages which can be read without863 * additional ready /busy waits */864 #define NAND_4PAGE_ARRAY 0x00000040865 866 867Constants for runtime options868~~~~~~~~~~~~~~~~~~~~~~~~~~~~~869 870These constants are defined in rawnand.h. They are OR-ed together to871describe the functionality::872 873 /* The hw ecc generator provides a syndrome instead a ecc value on read874 * This can only work if we have the ecc bytes directly behind the875 * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */876 #define NAND_HWECC_SYNDROME 0x00020000877 878 879ECC selection constants880-----------------------881 882Use these constants to select the ECC algorithm::883 884 /* No ECC. Usage is not recommended ! */885 #define NAND_ECC_NONE 0886 /* Software ECC 3 byte ECC per 256 Byte data */887 #define NAND_ECC_SOFT 1888 /* Hardware ECC 3 byte ECC per 256 Byte data */889 #define NAND_ECC_HW3_256 2890 /* Hardware ECC 3 byte ECC per 512 Byte data */891 #define NAND_ECC_HW3_512 3892 /* Hardware ECC 6 byte ECC per 512 Byte data */893 #define NAND_ECC_HW6_512 4894 /* Hardware ECC 8 byte ECC per 512 Byte data */895 #define NAND_ECC_HW8_512 6896 897 898Hardware control related constants899----------------------------------900 901These constants describe the requested hardware access function when the902boardspecific hardware control function is called::903 904 /* Select the chip by setting nCE to low */905 #define NAND_CTL_SETNCE 1906 /* Deselect the chip by setting nCE to high */907 #define NAND_CTL_CLRNCE 2908 /* Select the command latch by setting CLE to high */909 #define NAND_CTL_SETCLE 3910 /* Deselect the command latch by setting CLE to low */911 #define NAND_CTL_CLRCLE 4912 /* Select the address latch by setting ALE to high */913 #define NAND_CTL_SETALE 5914 /* Deselect the address latch by setting ALE to low */915 #define NAND_CTL_CLRALE 6916 /* Set write protection by setting WP to high. Not used! */917 #define NAND_CTL_SETWP 7918 /* Clear write protection by setting WP to low. Not used! */919 #define NAND_CTL_CLRWP 8920 921 922Bad block table related constants923---------------------------------924 925These constants describe the options used for bad block table926descriptors::927 928 /* Options for the bad block table descriptors */929 930 /* The number of bits used per block in the bbt on the device */931 #define NAND_BBT_NRBITS_MSK 0x0000000F932 #define NAND_BBT_1BIT 0x00000001933 #define NAND_BBT_2BIT 0x00000002934 #define NAND_BBT_4BIT 0x00000004935 #define NAND_BBT_8BIT 0x00000008936 /* The bad block table is in the last good block of the device */937 #define NAND_BBT_LASTBLOCK 0x00000010938 /* The bbt is at the given page, else we must scan for the bbt */939 #define NAND_BBT_ABSPAGE 0x00000020940 /* bbt is stored per chip on multichip devices */941 #define NAND_BBT_PERCHIP 0x00000080942 /* bbt has a version counter at offset veroffs */943 #define NAND_BBT_VERSION 0x00000100944 /* Create a bbt if none axists */945 #define NAND_BBT_CREATE 0x00000200946 /* Write bbt if necessary */947 #define NAND_BBT_WRITE 0x00001000948 /* Read and write back block contents when writing bbt */949 #define NAND_BBT_SAVECONTENT 0x00002000950 951 952Structures953==========954 955This chapter contains the autogenerated documentation of the structures956which are used in the NAND driver and might be relevant for a driver957developer. Each struct member has a short description which is marked958with an [XXX] identifier. See the chapter "Documentation hints" for an959explanation.960 961.. kernel-doc:: include/linux/mtd/rawnand.h962 :internal:963 964Public Functions Provided965=========================966 967This chapter contains the autogenerated documentation of the NAND kernel968API functions which are exported. Each function has a short description969which is marked with an [XXX] identifier. See the chapter "Documentation970hints" for an explanation.971 972.. kernel-doc:: drivers/mtd/nand/raw/nand_base.c973 :export:974 975Internal Functions Provided976===========================977 978This chapter contains the autogenerated documentation of the NAND driver979internal functions. Each function has a short description which is980marked with an [XXX] identifier. See the chapter "Documentation hints"981for an explanation. The functions marked with [DEFAULT] might be982relevant for a board driver developer.983 984.. kernel-doc:: drivers/mtd/nand/raw/nand_base.c985 :internal:986 987.. kernel-doc:: drivers/mtd/nand/raw/nand_bbt.c988 :internal:989 990Credits991=======992 993The following people have contributed to the NAND driver:994 9951. Steven J. Hill\ sjhill@realitydiluted.com996 9972. David Woodhouse\ dwmw2@infradead.org998 9993. Thomas Gleixner\ tglx@linutronix.de1000 1001A lot of users have provided bugfixes, improvements and helping hands1002for testing. Thanks a lot.1003 1004The following people have contributed to this document:1005 10061. Thomas Gleixner\ tglx@linutronix.de1007