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1====================================2Samsung USB 2.0 PHY adaptation layer3====================================4 51. Description6--------------7 8The architecture of the USB 2.0 PHY module in Samsung SoCs is similar9among many SoCs. In spite of the similarities it proved difficult to10create a one driver that would fit all these PHY controllers. Often11the differences were minor and were found in particular bits of the12registers of the PHY. In some rare cases the order of register writes or13the PHY powering up process had to be altered. This adaptation layer is14a compromise between having separate drivers and having a single driver15with added support for many special cases.16 172. Files description18--------------------19 20- phy-samsung-usb2.c21 This is the main file of the adaptation layer. This file contains22 the probe function and provides two callbacks to the Generic PHY23 Framework. This two callbacks are used to power on and power off the24 phy. They carry out the common work that has to be done on all version25 of the PHY module. Depending on which SoC was chosen they execute SoC26 specific callbacks. The specific SoC version is selected by choosing27 the appropriate compatible string. In addition, this file contains28 struct of_device_id definitions for particular SoCs.29 30- phy-samsung-usb2.h31 This is the include file. It declares the structures used by this32 driver. In addition it should contain extern declarations for33 structures that describe particular SoCs.34 353. Supporting SoCs36------------------37 38To support a new SoC a new file should be added to the drivers/phy39directory. Each SoC's configuration is stored in an instance of the40struct samsung_usb2_phy_config::41 42 struct samsung_usb2_phy_config {43 const struct samsung_usb2_common_phy *phys;44 int (*rate_to_clk)(unsigned long, u32 *);45 unsigned int num_phys;46 bool has_mode_switch;47 };48 49The num_phys is the number of phys handled by the driver. `*phys` is an50array that contains the configuration for each phy. The has_mode_switch51property is a boolean flag that determines whether the SoC has USB host52and device on a single pair of pins. If so, a special register has to53be modified to change the internal routing of these pins between a USB54device or host module.55 56For example the configuration for Exynos 4210 is following::57 58 const struct samsung_usb2_phy_config exynos4210_usb2_phy_config = {59 .has_mode_switch = 0,60 .num_phys = EXYNOS4210_NUM_PHYS,61 .phys = exynos4210_phys,62 .rate_to_clk = exynos4210_rate_to_clk,63 }64 65- `int (*rate_to_clk)(unsigned long, u32 *)`66 67 The rate_to_clk callback is to convert the rate of the clock68 used as the reference clock for the PHY module to the value69 that should be written in the hardware register.70 71The exynos4210_phys configuration array is as follows::72 73 static const struct samsung_usb2_common_phy exynos4210_phys[] = {74 {75 .label = "device",76 .id = EXYNOS4210_DEVICE,77 .power_on = exynos4210_power_on,78 .power_off = exynos4210_power_off,79 },80 {81 .label = "host",82 .id = EXYNOS4210_HOST,83 .power_on = exynos4210_power_on,84 .power_off = exynos4210_power_off,85 },86 {87 .label = "hsic0",88 .id = EXYNOS4210_HSIC0,89 .power_on = exynos4210_power_on,90 .power_off = exynos4210_power_off,91 },92 {93 .label = "hsic1",94 .id = EXYNOS4210_HSIC1,95 .power_on = exynos4210_power_on,96 .power_off = exynos4210_power_off,97 },98 {},99 };100 101- `int (*power_on)(struct samsung_usb2_phy_instance *);`102 `int (*power_off)(struct samsung_usb2_phy_instance *);`103 104 These two callbacks are used to power on and power off the phy105 by modifying appropriate registers.106 107Final change to the driver is adding appropriate compatible value to the108phy-samsung-usb2.c file. In case of Exynos 4210 the following lines were109added to the struct of_device_id samsung_usb2_phy_of_match[] array::110 111 #ifdef CONFIG_PHY_EXYNOS4210_USB2112 {113 .compatible = "samsung,exynos4210-usb2-phy",114 .data = &exynos4210_usb2_phy_config,115 },116 #endif117 118To add further flexibility to the driver the Kconfig file enables to119include support for selected SoCs in the compiled driver. The Kconfig120entry for Exynos 4210 is following::121 122 config PHY_EXYNOS4210_USB2123 bool "Support for Exynos 4210"124 depends on PHY_SAMSUNG_USB2125 depends on CPU_EXYNOS4210126 help127 Enable USB PHY support for Exynos 4210. This option requires that128 Samsung USB 2.0 PHY driver is enabled and means that support for this129 particular SoC is compiled in the driver. In case of Exynos 4210 four130 phys are available - device, host, HSCI0 and HSCI1.131 132The newly created file that supports the new SoC has to be also added to the133Makefile. In case of Exynos 4210 the added line is following::134 135 obj-$(CONFIG_PHY_EXYNOS4210_USB2) += phy-exynos4210-usb2.o136 137After completing these steps the support for the new SoC should be ready.138