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1======================2AMDgpu Display Manager3======================4 5.. contents:: Table of Contents6 :depth: 37 8.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c9 :doc: overview10 11.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h12 :internal:13 14Lifecycle15=========16 17.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c18 :doc: DM Lifecycle19 20.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c21 :functions: dm_hw_init dm_hw_fini22 23Interrupts24==========25 26.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c27 :doc: overview28 29.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c30 :internal:31 32.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c33 :functions: register_hpd_handlers dm_crtc_high_irq dm_pflip_high_irq34 35Atomic Implementation36=====================37 38.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c39 :doc: atomic40 41.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c42 :functions: amdgpu_dm_atomic_check amdgpu_dm_atomic_commit_tail43 44Color Management Properties45===========================46 47.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c48 :doc: overview49 50.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c51 :internal:52 53 54DC Color Capabilities between DCN generations55---------------------------------------------56 57DRM/KMS framework defines three CRTC color correction properties: degamma,58color transformation matrix (CTM) and gamma, and two properties for degamma and59gamma LUT sizes. AMD DC programs some of the color correction features60pre-blending but DRM/KMS has not per-plane color correction properties.61 62In general, the DRM CRTC color properties are programmed to DC, as follows:63CRTC gamma after blending, and CRTC degamma pre-blending. Although CTM is64programmed after blending, it is mapped to DPP hw blocks (pre-blending). Other65color caps available in the hw is not currently exposed by DRM interface and66are bypassed.67 68.. kernel-doc:: drivers/gpu/drm/amd/display/dc/dc.h69 :doc: color-management-caps70 71.. kernel-doc:: drivers/gpu/drm/amd/display/dc/dc.h72 :internal:73 74The color pipeline has undergone major changes between DCN hardware75generations. What's possible to do before and after blending depends on76hardware capabilities, as illustrated below by the DCN 2.0 and DCN 3.0 families77schemas.78 79**DCN 2.0 family color caps and mapping**80 81.. kernel-figure:: dcn2_cm_drm_current.svg82 83**DCN 3.0 family color caps and mapping**84 85.. kernel-figure:: dcn3_cm_drm_current.svg86 87Blend Mode Properties88=====================89 90Pixel blend mode is a DRM plane composition property of :c:type:`drm_plane` used to91describes how pixels from a foreground plane (fg) are composited with the92background plane (bg). Here, we present main concepts of DRM blend mode to help93to understand how this property is mapped to AMD DC interface. See more about94this DRM property and the alpha blending equations in :ref:`DRM Plane95Composition Properties <plane_composition_properties>`.96 97Basically, a blend mode sets the alpha blending equation for plane98composition that fits the mode in which the alpha channel affects the state of99pixel color values and, therefore, the resulted pixel color. For100example, consider the following elements of the alpha blending equation:101 102- *fg.rgb*: Each of the RGB component values from the foreground's pixel.103- *fg.alpha*: Alpha component value from the foreground's pixel.104- *bg.rgb*: Each of the RGB component values from the background.105- *plane_alpha*: Plane alpha value set by the **plane "alpha" property**, see106 more in :ref:`DRM Plane Composition Properties <plane_composition_properties>`.107 108in the basic alpha blending equation::109 110 out.rgb = alpha * fg.rgb + (1 - alpha) * bg.rgb111 112the alpha channel value of each pixel in a plane is ignored and only the plane113alpha affects the resulted pixel color values.114 115DRM has three blend mode to define the blend formula in the plane composition:116 117* **None**: Blend formula that ignores the pixel alpha.118 119* **Pre-multiplied**: Blend formula that assumes the pixel color values in a120 plane was already pre-multiplied by its own alpha channel before storage.121 122* **Coverage**: Blend formula that assumes the pixel color values were not123 pre-multiplied with the alpha channel values.124 125and pre-multiplied is the default pixel blend mode, that means, when no blend126mode property is created or defined, DRM considers the plane's pixels has127pre-multiplied color values. On IGT GPU tools, the kms_plane_alpha_blend test128provides a set of subtests to verify plane alpha and blend mode properties.129 130The DRM blend mode and its elements are then mapped by AMDGPU display manager131(DM) to program the blending configuration of the Multiple Pipe/Plane Combined132(MPC), as follows:133 134.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h135 :identifiers: mpcc_blnd_cfg136 137Therefore, the blending configuration for a single MPCC instance on the MPC138tree is defined by :c:type:`mpcc_blnd_cfg`, where139:c:type:`pre_multiplied_alpha` is the alpha pre-multiplied mode flag used to140set :c:type:`MPCC_ALPHA_MULTIPLIED_MODE`. It controls whether alpha is141multiplied (true/false), being only true for DRM pre-multiplied blend mode.142:c:type:`mpcc_alpha_blend_mode` defines the alpha blend mode regarding pixel143alpha and plane alpha values. It sets one of the three modes for144:c:type:`MPCC_ALPHA_BLND_MODE`, as described below.145 146.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h147 :identifiers: mpcc_alpha_blend_mode148 149DM then maps the elements of `enum mpcc_alpha_blend_mode` to those in the DRM150blend formula, as follows:151 152* *MPC pixel alpha* matches *DRM fg.alpha* as the alpha component value153 from the plane's pixel154* *MPC global alpha* matches *DRM plane_alpha* when the pixel alpha should155 be ignored and, therefore, pixel values are not pre-multiplied156* *MPC global gain* assumes *MPC global alpha* value when both *DRM157 fg.alpha* and *DRM plane_alpha* participate in the blend equation158 159In short, *fg.alpha* is ignored by selecting160:c:type:`MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA`. On the other hand, (plane_alpha *161fg.alpha) component becomes available by selecting162:c:type:`MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN`. And the163:c:type:`MPCC_ALPHA_MULTIPLIED_MODE` defines if the pixel color values are164pre-multiplied by alpha or not.165 166Blend configuration flow167------------------------168 169The alpha blending equation is configured from DRM to DC interface by the170following path:171 1721. When updating a :c:type:`drm_plane_state <drm_plane_state>`, DM calls173 :c:type:`amdgpu_dm_plane_fill_blending_from_plane_state()` that maps174 :c:type:`drm_plane_state <drm_plane_state>` attributes to175 :c:type:`dc_plane_info <dc_plane_info>` struct to be handled in the176 OS-agnostic component (DC).177 1782. On DC interface, :c:type:`struct mpcc_blnd_cfg <mpcc_blnd_cfg>` programs the179 MPCC blend configuration considering the :c:type:`dc_plane_info180 <dc_plane_info>` input from DPP.181