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1.. SPDX-License-Identifier: GPL-2.0-only2 3Kernel drivers ltc42824==========================================5 6Supported chips:7 8 * Analog Devices LTC42829 10 Prefix: 'ltc4282'11 12 Addresses scanned: - I2C 0x40 - 0x5A (7-bit)13 Addresses scanned: - I2C 0x80 - 0xB4 with a step of 2 (8-bit)14 15 Datasheet:16 17 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf18 19Author: Nuno Sá <nuno.sa@analog.com>20 21Description22___________23 24The LTC4282 hot swap controller allows a board to be safely inserted and removed25from a live backplane. Using one or more external N-channel pass transistors,26board supply voltage and inrush current are ramped up at an adjustable rate. An27I2C interface and onboard ADC allows for monitoring of board current, voltage,28power, energy and fault status. The device features analog foldback current29limiting and supply monitoring for applications from 2.9V to 33V. Dual 12V gate30drive allows high power applications to either share safe operating area across31parallel MOSFETs or support a 2-stage start-up that first charges the load32capacitance followed by enabling a low on-resistance path to the load. The33LTC4282 is well suited to high power applications because the precise monitoring34capability and accurate current limiting reduce the extremes in which both loads35and power supplies must safely operate. Non-volatile configuration allows for36flexibility in the autonomous generation of alerts and response to faults.37 38Sysfs entries39_____________40 41The following attributes are supported. Limits are read-write and all the other42attributes are read-only. Note that in0 and in1 are mutually exclusive. Enabling43one disables the other and disabling one enables the other.44 45======================= ==========================================46in0_input Output voltage (mV).47in0_min Undervoltage threshold48in0_max Overvoltage threshold49in0_lowest Lowest measured voltage50in0_highest Highest measured voltage51in0_reset_history Write 1 to reset in0 history.52 Also clears fet bad and short fault logs.53in0_min_alarm Undervoltage alarm54in0_max_alarm Overvoltage alarm55in0_enable Enable/Disable VSOURCE monitoring56in0_fault Failure in the MOSFETs. Either bad or shorted FET.57in0_label Channel label (VSOURCE)58 59in1_input Input voltage (mV).60in1_min Undervoltage threshold61in1_max Overvoltage threshold62in1_lowest Lowest measured voltage63in1_highest Highest measured voltage64in1_reset_history Write 1 to reset in1 history.65 Also clears over/undervoltage fault logs.66in1_min_alarm Undervoltage alarm67in1_max_alarm Overvoltage alarm68in1_lcrit_alarm Critical Undervoltage alarm69in1_crit_alarm Critical Overvoltage alarm70in1_enable Enable/Disable VDD monitoring71in1_label Channel label (VDD)72 73in2_input GPIO voltage (mV)74in2_min Undervoltage threshold75in2_max Overvoltage threshold76in2_lowest Lowest measured voltage77in2_highest Highest measured voltage78in2_reset_history Write 1 to reset in2 history79in2_min_alarm Undervoltage alarm80in2_max_alarm Overvoltage alarm81in2_label Channel label (VGPIO)82 83curr1_input Sense current (mA)84curr1_min Undercurrent threshold85curr1_max Overcurrent threshold86curr1_lowest Lowest measured current87curr1_highest Highest measured current88curr1_reset_history Write 1 to reset curr1 history.89 Also clears overcurrent fault logs.90curr1_min_alarm Undercurrent alarm91curr1_max_alarm Overcurrent alarm92curr1_crit_alarm Critical Overcurrent alarm93curr1_label Channel label (ISENSE)94 95power1_input Power (in uW)96power1_min Low power threshold97power1_max High power threshold98power1_input_lowest Historical minimum power use99power1_input_highest Historical maximum power use100power1_reset_history Write 1 to reset power1 history.101 Also clears power bad fault logs.102power1_min_alarm Low power alarm103power1_max_alarm High power alarm104power1_label Channel label (Power)105 106energy1_input Measured energy over time (in microJoule)107energy1_enable Enable/Disable Energy accumulation108======================= ==========================================109 110DebugFs entries111_______________112 113The chip also has a fault log register where failures can be logged. Hence,114as these are logging events, we give access to them in debugfs. Note that115even if some failure is detected in these logs, it does necessarily mean116that the failure is still present. As mentioned in the proper Sysfs entries,117these logs can be cleared by writing in the proper reset_history attribute.118 119.. warning:: The debugfs interface is subject to change without notice120 and is only available when the kernel is compiled with121 ``CONFIG_DEBUG_FS`` defined.122 123``/sys/kernel/debug/ltc4282-hwmon[X]/``124contains the following attributes:125 126======================= ==========================================127power1_bad_fault_log Set to 1 by a power1 bad fault occurring.128in0_fet_short_fault_log Set to 1 when the ADC detects a FET-short fault.129in0_fet_bad_fault_log Set to 1 when a FET-BAD fault occurs.130in1_crit_fault_log Set to 1 by a VDD overvoltage fault occurring.131in1_lcrit_fault_log Set to 1 by a VDD undervoltage fault occurring.132curr1_crit_fault_log Set to 1 by an overcurrent fault occurring.133======================= ==========================================134