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1=============================================2Broadcom Starfighter 2 Ethernet switch driver3=============================================4 5Broadcom's Starfighter 2 Ethernet switch hardware block is commonly found and6deployed in the following products:7 8- xDSL gateways such as BCM631389- streaming/multimedia Set Top Box such as BCM744510- Cable Modem/residential gateways such as BCM7145/BCM339011 12The switch is typically deployed in a configuration involving between 5 to 1313ports, offering a range of built-in and customizable interfaces:14 15- single integrated Gigabit PHY16- quad integrated Gigabit PHY17- quad external Gigabit PHY w/ MDIO multiplexer18- integrated MoCA PHY19- several external MII/RevMII/GMII/RGMII interfaces20 21The switch also supports specific congestion control features which allow MoCA22fail-over not to lose packets during a MoCA role re-election, as well as out of23band back-pressure to the host CPU network interface when downstream interfaces24are connected at a lower speed.25 26The switch hardware block is typically interfaced using MMIO accesses and27contains a bunch of sub-blocks/registers:28 29- ``SWITCH_CORE``: common switch registers30- ``SWITCH_REG``: external interfaces switch register31- ``SWITCH_MDIO``: external MDIO bus controller (there is another one in SWITCH_CORE,32 which is used for indirect PHY accesses)33- ``SWITCH_INDIR_RW``: 64-bits wide register helper block34- ``SWITCH_INTRL2_0/1``: Level-2 interrupt controllers35- ``SWITCH_ACB``: Admission control block36- ``SWITCH_FCB``: Fail-over control block37 38Implementation details39======================40 41The driver is located in ``drivers/net/dsa/bcm_sf2.c`` and is implemented as a DSA42driver; see ``Documentation/networking/dsa/dsa.rst`` for details on the subsystem43and what it provides.44 45The SF2 switch is configured to enable a Broadcom specific 4-bytes switch tag46which gets inserted by the switch for every packet forwarded to the CPU47interface, conversely, the CPU network interface should insert a similar tag for48packets entering the CPU port. The tag format is described in49``net/dsa/tag_brcm.c``.50 51Overall, the SF2 driver is a fairly regular DSA driver; there are a few52specifics covered below.53 54Device Tree probing55-------------------56 57The DSA platform device driver is probed using a specific compatible string58provided in ``net/dsa/dsa.c``. The reason for that is because the DSA subsystem gets59registered as a platform device driver currently. DSA will provide the needed60device_node pointers which are then accessible by the switch driver setup61function to setup resources such as register ranges and interrupts. This62currently works very well because none of the of_* functions utilized by the63driver require a struct device to be bound to a struct device_node, but things64may change in the future.65 66MDIO indirect accesses67----------------------68 69Due to a limitation in how Broadcom switches have been designed, external70Broadcom switches connected to a SF2 require the use of the DSA user MDIO bus71in order to properly configure them. By default, the SF2 pseudo-PHY address, and72an external switch pseudo-PHY address will both be snooping for incoming MDIO73transactions, since they are at the same address (30), resulting in some kind of74"double" programming. Using DSA, and setting ``ds->phys_mii_mask`` accordingly, we75selectively divert reads and writes towards external Broadcom switches76pseudo-PHY addresses. Newer revisions of the SF2 hardware have introduced a77configurable pseudo-PHY address which circumvents the initial design limitation.78 79Multimedia over CoAxial (MoCA) interfaces80-----------------------------------------81 82MoCA interfaces are fairly specific and require the use of a firmware blob which83gets loaded onto the MoCA processor(s) for packet processing. The switch84hardware contains logic which will assert/de-assert link states accordingly for85the MoCA interface whenever the MoCA coaxial cable gets disconnected or the86firmware gets reloaded. The SF2 driver relies on such events to properly set its87MoCA interface carrier state and properly report this to the networking stack.88 89The MoCA interfaces are supported using the PHY library's fixed PHY/emulated PHY90device and the switch driver registers a ``fixed_link_update`` callback for such91PHYs which reflects the link state obtained from the interrupt handler.92 93 94Power Management95----------------96 97Whenever possible, the SF2 driver tries to minimize the overall switch power98consumption by applying a combination of:99 100- turning off internal buffers/memories101- disabling packet processing logic102- putting integrated PHYs in IDDQ/low-power103- reducing the switch core clock based on the active port count104- enabling and advertising EEE105- turning off RGMII data processing logic when the link goes down106 107Wake-on-LAN108-----------109 110Wake-on-LAN is currently implemented by utilizing the host processor Ethernet111MAC controller wake-on logic. Whenever Wake-on-LAN is requested, an intersection112between the user request and the supported host Ethernet interface WoL113capabilities is done and the intersection result gets configured. During114system-wide suspend/resume, only ports not participating in Wake-on-LAN are115disabled.116