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1================2MSR Trace Events3================4 5The x86 kernel supports tracing most MSR (Model Specific Register) accesses.6To see the definition of the MSRs on Intel systems please see the SDM7at https://www.intel.com/sdm (Volume 3)8 9Available trace points:10 11/sys/kernel/tracing/events/msr/12 13Trace MSR reads:14 15read_msr16 17 - msr: MSR number18 - val: Value written19 - failed: 1 if the access failed, otherwise 020 21 22Trace MSR writes:23 24write_msr25 26 - msr: MSR number27 - val: Value written28 - failed: 1 if the access failed, otherwise 029 30 31Trace RDPMC in kernel:32 33rdpmc34 35The trace data can be post processed with the postprocess/decode_msr.py script::36 37 cat /sys/kernel/tracing/trace | decode_msr.py /usr/src/linux/include/asm/msr-index.h38 39to add symbolic MSR names.40 41