1058 lines · c
1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright 2016-2020 HabanaLabs, Ltd.4 * All Rights Reserved.5 *6 */7 8/************************************9 ** This is an auto-generated file **10 ** DO NOT EDIT BELOW **11 ************************************/12 13#ifndef ASIC_REG_ROT0_QM_REGS_H_14#define ASIC_REG_ROT0_QM_REGS_H_15 16/*17 *****************************************18 * ROT0_QM19 * (Prototype: QMAN)20 *****************************************21 */22 23#define mmROT0_QM_GLBL_CFG0 0x4E0A00024 25#define mmROT0_QM_GLBL_CFG1 0x4E0A00426 27#define mmROT0_QM_GLBL_CFG2 0x4E0A00828 29#define mmROT0_QM_GLBL_ERR_CFG 0x4E0A00C30 31#define mmROT0_QM_GLBL_ERR_CFG1 0x4E0A01032 33#define mmROT0_QM_GLBL_ERR_ARC_HALT_EN 0x4E0A01434 35#define mmROT0_QM_GLBL_AXCACHE 0x4E0A01836 37#define mmROT0_QM_GLBL_STS0 0x4E0A01C38 39#define mmROT0_QM_GLBL_STS1 0x4E0A02040 41#define mmROT0_QM_GLBL_ERR_STS_0 0x4E0A02442 43#define mmROT0_QM_GLBL_ERR_STS_1 0x4E0A02844 45#define mmROT0_QM_GLBL_ERR_STS_2 0x4E0A02C46 47#define mmROT0_QM_GLBL_ERR_STS_3 0x4E0A03048 49#define mmROT0_QM_GLBL_ERR_STS_4 0x4E0A03450 51#define mmROT0_QM_GLBL_ERR_MSG_EN_0 0x4E0A03852 53#define mmROT0_QM_GLBL_ERR_MSG_EN_1 0x4E0A03C54 55#define mmROT0_QM_GLBL_ERR_MSG_EN_2 0x4E0A04056 57#define mmROT0_QM_GLBL_ERR_MSG_EN_3 0x4E0A04458 59#define mmROT0_QM_GLBL_ERR_MSG_EN_4 0x4E0A04860 61#define mmROT0_QM_GLBL_PROT 0x4E0A04C62 63#define mmROT0_QM_PQ_BASE_LO_0 0x4E0A05064 65#define mmROT0_QM_PQ_BASE_LO_1 0x4E0A05466 67#define mmROT0_QM_PQ_BASE_LO_2 0x4E0A05868 69#define mmROT0_QM_PQ_BASE_LO_3 0x4E0A05C70 71#define mmROT0_QM_PQ_BASE_HI_0 0x4E0A06072 73#define mmROT0_QM_PQ_BASE_HI_1 0x4E0A06474 75#define mmROT0_QM_PQ_BASE_HI_2 0x4E0A06876 77#define mmROT0_QM_PQ_BASE_HI_3 0x4E0A06C78 79#define mmROT0_QM_PQ_SIZE_0 0x4E0A07080 81#define mmROT0_QM_PQ_SIZE_1 0x4E0A07482 83#define mmROT0_QM_PQ_SIZE_2 0x4E0A07884 85#define mmROT0_QM_PQ_SIZE_3 0x4E0A07C86 87#define mmROT0_QM_PQ_PI_0 0x4E0A08088 89#define mmROT0_QM_PQ_PI_1 0x4E0A08490 91#define mmROT0_QM_PQ_PI_2 0x4E0A08892 93#define mmROT0_QM_PQ_PI_3 0x4E0A08C94 95#define mmROT0_QM_PQ_CI_0 0x4E0A09096 97#define mmROT0_QM_PQ_CI_1 0x4E0A09498 99#define mmROT0_QM_PQ_CI_2 0x4E0A098100 101#define mmROT0_QM_PQ_CI_3 0x4E0A09C102 103#define mmROT0_QM_PQ_CFG0_0 0x4E0A0A0104 105#define mmROT0_QM_PQ_CFG0_1 0x4E0A0A4106 107#define mmROT0_QM_PQ_CFG0_2 0x4E0A0A8108 109#define mmROT0_QM_PQ_CFG0_3 0x4E0A0AC110 111#define mmROT0_QM_PQ_CFG1_0 0x4E0A0B0112 113#define mmROT0_QM_PQ_CFG1_1 0x4E0A0B4114 115#define mmROT0_QM_PQ_CFG1_2 0x4E0A0B8116 117#define mmROT0_QM_PQ_CFG1_3 0x4E0A0BC118 119#define mmROT0_QM_PQ_STS0_0 0x4E0A0C0120 121#define mmROT0_QM_PQ_STS0_1 0x4E0A0C4122 123#define mmROT0_QM_PQ_STS0_2 0x4E0A0C8124 125#define mmROT0_QM_PQ_STS0_3 0x4E0A0CC126 127#define mmROT0_QM_PQ_STS1_0 0x4E0A0D0128 129#define mmROT0_QM_PQ_STS1_1 0x4E0A0D4130 131#define mmROT0_QM_PQ_STS1_2 0x4E0A0D8132 133#define mmROT0_QM_PQ_STS1_3 0x4E0A0DC134 135#define mmROT0_QM_CQ_CFG0_0 0x4E0A0E0136 137#define mmROT0_QM_CQ_CFG0_1 0x4E0A0E4138 139#define mmROT0_QM_CQ_CFG0_2 0x4E0A0E8140 141#define mmROT0_QM_CQ_CFG0_3 0x4E0A0EC142 143#define mmROT0_QM_CQ_CFG0_4 0x4E0A0F0144 145#define mmROT0_QM_CQ_STS0_0 0x4E0A0F4146 147#define mmROT0_QM_CQ_STS0_1 0x4E0A0F8148 149#define mmROT0_QM_CQ_STS0_2 0x4E0A0FC150 151#define mmROT0_QM_CQ_STS0_3 0x4E0A100152 153#define mmROT0_QM_CQ_STS0_4 0x4E0A104154 155#define mmROT0_QM_CQ_CFG1_0 0x4E0A108156 157#define mmROT0_QM_CQ_CFG1_1 0x4E0A10C158 159#define mmROT0_QM_CQ_CFG1_2 0x4E0A110160 161#define mmROT0_QM_CQ_CFG1_3 0x4E0A114162 163#define mmROT0_QM_CQ_CFG1_4 0x4E0A118164 165#define mmROT0_QM_CQ_STS1_0 0x4E0A11C166 167#define mmROT0_QM_CQ_STS1_1 0x4E0A120168 169#define mmROT0_QM_CQ_STS1_2 0x4E0A124170 171#define mmROT0_QM_CQ_STS1_3 0x4E0A128172 173#define mmROT0_QM_CQ_STS1_4 0x4E0A12C174 175#define mmROT0_QM_CQ_PTR_LO_0 0x4E0A150176 177#define mmROT0_QM_CQ_PTR_HI_0 0x4E0A154178 179#define mmROT0_QM_CQ_TSIZE_0 0x4E0A158180 181#define mmROT0_QM_CQ_CTL_0 0x4E0A15C182 183#define mmROT0_QM_CQ_PTR_LO_1 0x4E0A160184 185#define mmROT0_QM_CQ_PTR_HI_1 0x4E0A164186 187#define mmROT0_QM_CQ_TSIZE_1 0x4E0A168188 189#define mmROT0_QM_CQ_CTL_1 0x4E0A16C190 191#define mmROT0_QM_CQ_PTR_LO_2 0x4E0A170192 193#define mmROT0_QM_CQ_PTR_HI_2 0x4E0A174194 195#define mmROT0_QM_CQ_TSIZE_2 0x4E0A178196 197#define mmROT0_QM_CQ_CTL_2 0x4E0A17C198 199#define mmROT0_QM_CQ_PTR_LO_3 0x4E0A180200 201#define mmROT0_QM_CQ_PTR_HI_3 0x4E0A184202 203#define mmROT0_QM_CQ_TSIZE_3 0x4E0A188204 205#define mmROT0_QM_CQ_CTL_3 0x4E0A18C206 207#define mmROT0_QM_CQ_PTR_LO_4 0x4E0A190208 209#define mmROT0_QM_CQ_PTR_HI_4 0x4E0A194210 211#define mmROT0_QM_CQ_TSIZE_4 0x4E0A198212 213#define mmROT0_QM_CQ_CTL_4 0x4E0A19C214 215#define mmROT0_QM_CQ_TSIZE_STS_0 0x4E0A1A0216 217#define mmROT0_QM_CQ_TSIZE_STS_1 0x4E0A1A4218 219#define mmROT0_QM_CQ_TSIZE_STS_2 0x4E0A1A8220 221#define mmROT0_QM_CQ_TSIZE_STS_3 0x4E0A1AC222 223#define mmROT0_QM_CQ_TSIZE_STS_4 0x4E0A1B0224 225#define mmROT0_QM_CQ_PTR_LO_STS_0 0x4E0A1B4226 227#define mmROT0_QM_CQ_PTR_LO_STS_1 0x4E0A1B8228 229#define mmROT0_QM_CQ_PTR_LO_STS_2 0x4E0A1BC230 231#define mmROT0_QM_CQ_PTR_LO_STS_3 0x4E0A1C0232 233#define mmROT0_QM_CQ_PTR_LO_STS_4 0x4E0A1C4234 235#define mmROT0_QM_CQ_PTR_HI_STS_0 0x4E0A1C8236 237#define mmROT0_QM_CQ_PTR_HI_STS_1 0x4E0A1CC238 239#define mmROT0_QM_CQ_PTR_HI_STS_2 0x4E0A1D0240 241#define mmROT0_QM_CQ_PTR_HI_STS_3 0x4E0A1D4242 243#define mmROT0_QM_CQ_PTR_HI_STS_4 0x4E0A1D8244 245#define mmROT0_QM_CQ_IFIFO_STS_0 0x4E0A1DC246 247#define mmROT0_QM_CQ_IFIFO_STS_1 0x4E0A1E0248 249#define mmROT0_QM_CQ_IFIFO_STS_2 0x4E0A1E4250 251#define mmROT0_QM_CQ_IFIFO_STS_3 0x4E0A1E8252 253#define mmROT0_QM_CQ_IFIFO_STS_4 0x4E0A1EC254 255#define mmROT0_QM_CP_MSG_BASE0_ADDR_LO_0 0x4E0A1F0256 257#define mmROT0_QM_CP_MSG_BASE0_ADDR_LO_1 0x4E0A1F4258 259#define mmROT0_QM_CP_MSG_BASE0_ADDR_LO_2 0x4E0A1F8260 261#define mmROT0_QM_CP_MSG_BASE0_ADDR_LO_3 0x4E0A1FC262 263#define mmROT0_QM_CP_MSG_BASE0_ADDR_LO_4 0x4E0A200264 265#define mmROT0_QM_CP_MSG_BASE0_ADDR_HI_0 0x4E0A204266 267#define mmROT0_QM_CP_MSG_BASE0_ADDR_HI_1 0x4E0A208268 269#define mmROT0_QM_CP_MSG_BASE0_ADDR_HI_2 0x4E0A20C270 271#define mmROT0_QM_CP_MSG_BASE0_ADDR_HI_3 0x4E0A210272 273#define mmROT0_QM_CP_MSG_BASE0_ADDR_HI_4 0x4E0A214274 275#define mmROT0_QM_CP_MSG_BASE1_ADDR_LO_0 0x4E0A218276 277#define mmROT0_QM_CP_MSG_BASE1_ADDR_LO_1 0x4E0A21C278 279#define mmROT0_QM_CP_MSG_BASE1_ADDR_LO_2 0x4E0A220280 281#define mmROT0_QM_CP_MSG_BASE1_ADDR_LO_3 0x4E0A224282 283#define mmROT0_QM_CP_MSG_BASE1_ADDR_LO_4 0x4E0A228284 285#define mmROT0_QM_CP_MSG_BASE1_ADDR_HI_0 0x4E0A22C286 287#define mmROT0_QM_CP_MSG_BASE1_ADDR_HI_1 0x4E0A230288 289#define mmROT0_QM_CP_MSG_BASE1_ADDR_HI_2 0x4E0A234290 291#define mmROT0_QM_CP_MSG_BASE1_ADDR_HI_3 0x4E0A238292 293#define mmROT0_QM_CP_MSG_BASE1_ADDR_HI_4 0x4E0A23C294 295#define mmROT0_QM_CP_MSG_BASE2_ADDR_LO_0 0x4E0A240296 297#define mmROT0_QM_CP_MSG_BASE2_ADDR_LO_1 0x4E0A244298 299#define mmROT0_QM_CP_MSG_BASE2_ADDR_LO_2 0x4E0A248300 301#define mmROT0_QM_CP_MSG_BASE2_ADDR_LO_3 0x4E0A24C302 303#define mmROT0_QM_CP_MSG_BASE2_ADDR_LO_4 0x4E0A250304 305#define mmROT0_QM_CP_MSG_BASE2_ADDR_HI_0 0x4E0A254306 307#define mmROT0_QM_CP_MSG_BASE2_ADDR_HI_1 0x4E0A258308 309#define mmROT0_QM_CP_MSG_BASE2_ADDR_HI_2 0x4E0A25C310 311#define mmROT0_QM_CP_MSG_BASE2_ADDR_HI_3 0x4E0A260312 313#define mmROT0_QM_CP_MSG_BASE2_ADDR_HI_4 0x4E0A264314 315#define mmROT0_QM_CP_MSG_BASE3_ADDR_LO_0 0x4E0A268316 317#define mmROT0_QM_CP_MSG_BASE3_ADDR_LO_1 0x4E0A26C318 319#define mmROT0_QM_CP_MSG_BASE3_ADDR_LO_2 0x4E0A270320 321#define mmROT0_QM_CP_MSG_BASE3_ADDR_LO_3 0x4E0A274322 323#define mmROT0_QM_CP_MSG_BASE3_ADDR_LO_4 0x4E0A278324 325#define mmROT0_QM_CP_MSG_BASE3_ADDR_HI_0 0x4E0A27C326 327#define mmROT0_QM_CP_MSG_BASE3_ADDR_HI_1 0x4E0A280328 329#define mmROT0_QM_CP_MSG_BASE3_ADDR_HI_2 0x4E0A284330 331#define mmROT0_QM_CP_MSG_BASE3_ADDR_HI_3 0x4E0A288332 333#define mmROT0_QM_CP_MSG_BASE3_ADDR_HI_4 0x4E0A28C334 335#define mmROT0_QM_CP_FENCE0_RDATA_0 0x4E0A290336 337#define mmROT0_QM_CP_FENCE0_RDATA_1 0x4E0A294338 339#define mmROT0_QM_CP_FENCE0_RDATA_2 0x4E0A298340 341#define mmROT0_QM_CP_FENCE0_RDATA_3 0x4E0A29C342 343#define mmROT0_QM_CP_FENCE0_RDATA_4 0x4E0A2A0344 345#define mmROT0_QM_CP_FENCE1_RDATA_0 0x4E0A2A4346 347#define mmROT0_QM_CP_FENCE1_RDATA_1 0x4E0A2A8348 349#define mmROT0_QM_CP_FENCE1_RDATA_2 0x4E0A2AC350 351#define mmROT0_QM_CP_FENCE1_RDATA_3 0x4E0A2B0352 353#define mmROT0_QM_CP_FENCE1_RDATA_4 0x4E0A2B4354 355#define mmROT0_QM_CP_FENCE2_RDATA_0 0x4E0A2B8356 357#define mmROT0_QM_CP_FENCE2_RDATA_1 0x4E0A2BC358 359#define mmROT0_QM_CP_FENCE2_RDATA_2 0x4E0A2C0360 361#define mmROT0_QM_CP_FENCE2_RDATA_3 0x4E0A2C4362 363#define mmROT0_QM_CP_FENCE2_RDATA_4 0x4E0A2C8364 365#define mmROT0_QM_CP_FENCE3_RDATA_0 0x4E0A2CC366 367#define mmROT0_QM_CP_FENCE3_RDATA_1 0x4E0A2D0368 369#define mmROT0_QM_CP_FENCE3_RDATA_2 0x4E0A2D4370 371#define mmROT0_QM_CP_FENCE3_RDATA_3 0x4E0A2D8372 373#define mmROT0_QM_CP_FENCE3_RDATA_4 0x4E0A2DC374 375#define mmROT0_QM_CP_FENCE0_CNT_0 0x4E0A2E0376 377#define mmROT0_QM_CP_FENCE0_CNT_1 0x4E0A2E4378 379#define mmROT0_QM_CP_FENCE0_CNT_2 0x4E0A2E8380 381#define mmROT0_QM_CP_FENCE0_CNT_3 0x4E0A2EC382 383#define mmROT0_QM_CP_FENCE0_CNT_4 0x4E0A2F0384 385#define mmROT0_QM_CP_FENCE1_CNT_0 0x4E0A2F4386 387#define mmROT0_QM_CP_FENCE1_CNT_1 0x4E0A2F8388 389#define mmROT0_QM_CP_FENCE1_CNT_2 0x4E0A2FC390 391#define mmROT0_QM_CP_FENCE1_CNT_3 0x4E0A300392 393#define mmROT0_QM_CP_FENCE1_CNT_4 0x4E0A304394 395#define mmROT0_QM_CP_FENCE2_CNT_0 0x4E0A308396 397#define mmROT0_QM_CP_FENCE2_CNT_1 0x4E0A30C398 399#define mmROT0_QM_CP_FENCE2_CNT_2 0x4E0A310400 401#define mmROT0_QM_CP_FENCE2_CNT_3 0x4E0A314402 403#define mmROT0_QM_CP_FENCE2_CNT_4 0x4E0A318404 405#define mmROT0_QM_CP_FENCE3_CNT_0 0x4E0A31C406 407#define mmROT0_QM_CP_FENCE3_CNT_1 0x4E0A320408 409#define mmROT0_QM_CP_FENCE3_CNT_2 0x4E0A324410 411#define mmROT0_QM_CP_FENCE3_CNT_3 0x4E0A328412 413#define mmROT0_QM_CP_FENCE3_CNT_4 0x4E0A32C414 415#define mmROT0_QM_CP_BARRIER_CFG 0x4E0A330416 417#define mmROT0_QM_CP_LDMA_SRC_BASE_LO_OFFSET 0x4E0A334418 419#define mmROT0_QM_CP_LDMA_DST_BASE_LO_OFFSET 0x4E0A338420 421#define mmROT0_QM_CP_LDMA_TSIZE_OFFSET 0x4E0A33C422 423#define mmROT0_QM_CP_CQ_PTR_LO_OFFSET_0 0x4E0A340424 425#define mmROT0_QM_CP_CQ_PTR_LO_OFFSET_1 0x4E0A344426 427#define mmROT0_QM_CP_CQ_PTR_LO_OFFSET_2 0x4E0A348428 429#define mmROT0_QM_CP_CQ_PTR_LO_OFFSET_3 0x4E0A34C430 431#define mmROT0_QM_CP_CQ_PTR_LO_OFFSET_4 0x4E0A350432 433#define mmROT0_QM_CP_STS_0 0x4E0A368434 435#define mmROT0_QM_CP_STS_1 0x4E0A36C436 437#define mmROT0_QM_CP_STS_2 0x4E0A370438 439#define mmROT0_QM_CP_STS_3 0x4E0A374440 441#define mmROT0_QM_CP_STS_4 0x4E0A378442 443#define mmROT0_QM_CP_CURRENT_INST_LO_0 0x4E0A37C444 445#define mmROT0_QM_CP_CURRENT_INST_LO_1 0x4E0A380446 447#define mmROT0_QM_CP_CURRENT_INST_LO_2 0x4E0A384448 449#define mmROT0_QM_CP_CURRENT_INST_LO_3 0x4E0A388450 451#define mmROT0_QM_CP_CURRENT_INST_LO_4 0x4E0A38C452 453#define mmROT0_QM_CP_CURRENT_INST_HI_0 0x4E0A390454 455#define mmROT0_QM_CP_CURRENT_INST_HI_1 0x4E0A394456 457#define mmROT0_QM_CP_CURRENT_INST_HI_2 0x4E0A398458 459#define mmROT0_QM_CP_CURRENT_INST_HI_3 0x4E0A39C460 461#define mmROT0_QM_CP_CURRENT_INST_HI_4 0x4E0A3A0462 463#define mmROT0_QM_CP_PRED_0 0x4E0A3A4464 465#define mmROT0_QM_CP_PRED_1 0x4E0A3A8466 467#define mmROT0_QM_CP_PRED_2 0x4E0A3AC468 469#define mmROT0_QM_CP_PRED_3 0x4E0A3B0470 471#define mmROT0_QM_CP_PRED_4 0x4E0A3B4472 473#define mmROT0_QM_CP_PRED_UPEN_0 0x4E0A3B8474 475#define mmROT0_QM_CP_PRED_UPEN_1 0x4E0A3BC476 477#define mmROT0_QM_CP_PRED_UPEN_2 0x4E0A3C0478 479#define mmROT0_QM_CP_PRED_UPEN_3 0x4E0A3C4480 481#define mmROT0_QM_CP_PRED_UPEN_4 0x4E0A3C8482 483#define mmROT0_QM_CP_DBG_0_0 0x4E0A3CC484 485#define mmROT0_QM_CP_DBG_0_1 0x4E0A3D0486 487#define mmROT0_QM_CP_DBG_0_2 0x4E0A3D4488 489#define mmROT0_QM_CP_DBG_0_3 0x4E0A3D8490 491#define mmROT0_QM_CP_DBG_0_4 0x4E0A3DC492 493#define mmROT0_QM_CP_CPDMA_UP_CRED_0 0x4E0A3E0494 495#define mmROT0_QM_CP_CPDMA_UP_CRED_1 0x4E0A3E4496 497#define mmROT0_QM_CP_CPDMA_UP_CRED_2 0x4E0A3E8498 499#define mmROT0_QM_CP_CPDMA_UP_CRED_3 0x4E0A3EC500 501#define mmROT0_QM_CP_CPDMA_UP_CRED_4 0x4E0A3F0502 503#define mmROT0_QM_CP_IN_DATA_LO_0 0x4E0A3F4504 505#define mmROT0_QM_CP_IN_DATA_LO_1 0x4E0A3F8506 507#define mmROT0_QM_CP_IN_DATA_LO_2 0x4E0A3FC508 509#define mmROT0_QM_CP_IN_DATA_LO_3 0x4E0A400510 511#define mmROT0_QM_CP_IN_DATA_LO_4 0x4E0A404512 513#define mmROT0_QM_CP_IN_DATA_HI_0 0x4E0A408514 515#define mmROT0_QM_CP_IN_DATA_HI_1 0x4E0A40C516 517#define mmROT0_QM_CP_IN_DATA_HI_2 0x4E0A410518 519#define mmROT0_QM_CP_IN_DATA_HI_3 0x4E0A414520 521#define mmROT0_QM_CP_IN_DATA_HI_4 0x4E0A418522 523#define mmROT0_QM_PQC_HBW_BASE_LO_0 0x4E0A41C524 525#define mmROT0_QM_PQC_HBW_BASE_LO_1 0x4E0A420526 527#define mmROT0_QM_PQC_HBW_BASE_LO_2 0x4E0A424528 529#define mmROT0_QM_PQC_HBW_BASE_LO_3 0x4E0A428530 531#define mmROT0_QM_PQC_HBW_BASE_HI_0 0x4E0A42C532 533#define mmROT0_QM_PQC_HBW_BASE_HI_1 0x4E0A430534 535#define mmROT0_QM_PQC_HBW_BASE_HI_2 0x4E0A434536 537#define mmROT0_QM_PQC_HBW_BASE_HI_3 0x4E0A438538 539#define mmROT0_QM_PQC_SIZE_0 0x4E0A43C540 541#define mmROT0_QM_PQC_SIZE_1 0x4E0A440542 543#define mmROT0_QM_PQC_SIZE_2 0x4E0A444544 545#define mmROT0_QM_PQC_SIZE_3 0x4E0A448546 547#define mmROT0_QM_PQC_PI_0 0x4E0A44C548 549#define mmROT0_QM_PQC_PI_1 0x4E0A450550 551#define mmROT0_QM_PQC_PI_2 0x4E0A454552 553#define mmROT0_QM_PQC_PI_3 0x4E0A458554 555#define mmROT0_QM_PQC_LBW_WDATA_0 0x4E0A45C556 557#define mmROT0_QM_PQC_LBW_WDATA_1 0x4E0A460558 559#define mmROT0_QM_PQC_LBW_WDATA_2 0x4E0A464560 561#define mmROT0_QM_PQC_LBW_WDATA_3 0x4E0A468562 563#define mmROT0_QM_PQC_LBW_BASE_LO_0 0x4E0A46C564 565#define mmROT0_QM_PQC_LBW_BASE_LO_1 0x4E0A470566 567#define mmROT0_QM_PQC_LBW_BASE_LO_2 0x4E0A474568 569#define mmROT0_QM_PQC_LBW_BASE_LO_3 0x4E0A478570 571#define mmROT0_QM_PQC_LBW_BASE_HI_0 0x4E0A47C572 573#define mmROT0_QM_PQC_LBW_BASE_HI_1 0x4E0A480574 575#define mmROT0_QM_PQC_LBW_BASE_HI_2 0x4E0A484576 577#define mmROT0_QM_PQC_LBW_BASE_HI_3 0x4E0A488578 579#define mmROT0_QM_PQC_CFG 0x4E0A48C580 581#define mmROT0_QM_PQC_SECURE_PUSH_IND 0x4E0A490582 583#define mmROT0_QM_ARB_MASK 0x4E0A4A0584 585#define mmROT0_QM_ARB_CFG_0 0x4E0A4A4586 587#define mmROT0_QM_ARB_CHOICE_Q_PUSH 0x4E0A4A8588 589#define mmROT0_QM_ARB_WRR_WEIGHT_0 0x4E0A4AC590 591#define mmROT0_QM_ARB_WRR_WEIGHT_1 0x4E0A4B0592 593#define mmROT0_QM_ARB_WRR_WEIGHT_2 0x4E0A4B4594 595#define mmROT0_QM_ARB_WRR_WEIGHT_3 0x4E0A4B8596 597#define mmROT0_QM_ARB_CFG_1 0x4E0A4BC598 599#define mmROT0_QM_ARB_MST_AVAIL_CRED_0 0x4E0A4C0600 601#define mmROT0_QM_ARB_MST_AVAIL_CRED_1 0x4E0A4C4602 603#define mmROT0_QM_ARB_MST_AVAIL_CRED_2 0x4E0A4C8604 605#define mmROT0_QM_ARB_MST_AVAIL_CRED_3 0x4E0A4CC606 607#define mmROT0_QM_ARB_MST_AVAIL_CRED_4 0x4E0A4D0608 609#define mmROT0_QM_ARB_MST_AVAIL_CRED_5 0x4E0A4D4610 611#define mmROT0_QM_ARB_MST_AVAIL_CRED_6 0x4E0A4D8612 613#define mmROT0_QM_ARB_MST_AVAIL_CRED_7 0x4E0A4DC614 615#define mmROT0_QM_ARB_MST_AVAIL_CRED_8 0x4E0A4E0616 617#define mmROT0_QM_ARB_MST_AVAIL_CRED_9 0x4E0A4E4618 619#define mmROT0_QM_ARB_MST_AVAIL_CRED_10 0x4E0A4E8620 621#define mmROT0_QM_ARB_MST_AVAIL_CRED_11 0x4E0A4EC622 623#define mmROT0_QM_ARB_MST_AVAIL_CRED_12 0x4E0A4F0624 625#define mmROT0_QM_ARB_MST_AVAIL_CRED_13 0x4E0A4F4626 627#define mmROT0_QM_ARB_MST_AVAIL_CRED_14 0x4E0A4F8628 629#define mmROT0_QM_ARB_MST_AVAIL_CRED_15 0x4E0A4FC630 631#define mmROT0_QM_ARB_MST_AVAIL_CRED_16 0x4E0A500632 633#define mmROT0_QM_ARB_MST_AVAIL_CRED_17 0x4E0A504634 635#define mmROT0_QM_ARB_MST_AVAIL_CRED_18 0x4E0A508636 637#define mmROT0_QM_ARB_MST_AVAIL_CRED_19 0x4E0A50C638 639#define mmROT0_QM_ARB_MST_AVAIL_CRED_20 0x4E0A510640 641#define mmROT0_QM_ARB_MST_AVAIL_CRED_21 0x4E0A514642 643#define mmROT0_QM_ARB_MST_AVAIL_CRED_22 0x4E0A518644 645#define mmROT0_QM_ARB_MST_AVAIL_CRED_23 0x4E0A51C646 647#define mmROT0_QM_ARB_MST_AVAIL_CRED_24 0x4E0A520648 649#define mmROT0_QM_ARB_MST_AVAIL_CRED_25 0x4E0A524650 651#define mmROT0_QM_ARB_MST_AVAIL_CRED_26 0x4E0A528652 653#define mmROT0_QM_ARB_MST_AVAIL_CRED_27 0x4E0A52C654 655#define mmROT0_QM_ARB_MST_AVAIL_CRED_28 0x4E0A530656 657#define mmROT0_QM_ARB_MST_AVAIL_CRED_29 0x4E0A534658 659#define mmROT0_QM_ARB_MST_AVAIL_CRED_30 0x4E0A538660 661#define mmROT0_QM_ARB_MST_AVAIL_CRED_31 0x4E0A53C662 663#define mmROT0_QM_ARB_MST_AVAIL_CRED_32 0x4E0A540664 665#define mmROT0_QM_ARB_MST_AVAIL_CRED_33 0x4E0A544666 667#define mmROT0_QM_ARB_MST_AVAIL_CRED_34 0x4E0A548668 669#define mmROT0_QM_ARB_MST_AVAIL_CRED_35 0x4E0A54C670 671#define mmROT0_QM_ARB_MST_AVAIL_CRED_36 0x4E0A550672 673#define mmROT0_QM_ARB_MST_AVAIL_CRED_37 0x4E0A554674 675#define mmROT0_QM_ARB_MST_AVAIL_CRED_38 0x4E0A558676 677#define mmROT0_QM_ARB_MST_AVAIL_CRED_39 0x4E0A55C678 679#define mmROT0_QM_ARB_MST_AVAIL_CRED_40 0x4E0A560680 681#define mmROT0_QM_ARB_MST_AVAIL_CRED_41 0x4E0A564682 683#define mmROT0_QM_ARB_MST_AVAIL_CRED_42 0x4E0A568684 685#define mmROT0_QM_ARB_MST_AVAIL_CRED_43 0x4E0A56C686 687#define mmROT0_QM_ARB_MST_AVAIL_CRED_44 0x4E0A570688 689#define mmROT0_QM_ARB_MST_AVAIL_CRED_45 0x4E0A574690 691#define mmROT0_QM_ARB_MST_AVAIL_CRED_46 0x4E0A578692 693#define mmROT0_QM_ARB_MST_AVAIL_CRED_47 0x4E0A57C694 695#define mmROT0_QM_ARB_MST_AVAIL_CRED_48 0x4E0A580696 697#define mmROT0_QM_ARB_MST_AVAIL_CRED_49 0x4E0A584698 699#define mmROT0_QM_ARB_MST_AVAIL_CRED_50 0x4E0A588700 701#define mmROT0_QM_ARB_MST_AVAIL_CRED_51 0x4E0A58C702 703#define mmROT0_QM_ARB_MST_AVAIL_CRED_52 0x4E0A590704 705#define mmROT0_QM_ARB_MST_AVAIL_CRED_53 0x4E0A594706 707#define mmROT0_QM_ARB_MST_AVAIL_CRED_54 0x4E0A598708 709#define mmROT0_QM_ARB_MST_AVAIL_CRED_55 0x4E0A59C710 711#define mmROT0_QM_ARB_MST_AVAIL_CRED_56 0x4E0A5A0712 713#define mmROT0_QM_ARB_MST_AVAIL_CRED_57 0x4E0A5A4714 715#define mmROT0_QM_ARB_MST_AVAIL_CRED_58 0x4E0A5A8716 717#define mmROT0_QM_ARB_MST_AVAIL_CRED_59 0x4E0A5AC718 719#define mmROT0_QM_ARB_MST_AVAIL_CRED_60 0x4E0A5B0720 721#define mmROT0_QM_ARB_MST_AVAIL_CRED_61 0x4E0A5B4722 723#define mmROT0_QM_ARB_MST_AVAIL_CRED_62 0x4E0A5B8724 725#define mmROT0_QM_ARB_MST_AVAIL_CRED_63 0x4E0A5BC726 727#define mmROT0_QM_ARB_MST_CRED_INC 0x4E0A5E0728 729#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_0 0x4E0A5E4730 731#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_1 0x4E0A5E8732 733#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_2 0x4E0A5EC734 735#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_3 0x4E0A5F0736 737#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_4 0x4E0A5F4738 739#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_5 0x4E0A5F8740 741#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_6 0x4E0A5FC742 743#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_7 0x4E0A600744 745#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_8 0x4E0A604746 747#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_9 0x4E0A608748 749#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_10 0x4E0A60C750 751#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_11 0x4E0A610752 753#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_12 0x4E0A614754 755#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_13 0x4E0A618756 757#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_14 0x4E0A61C758 759#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_15 0x4E0A620760 761#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_16 0x4E0A624762 763#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_17 0x4E0A628764 765#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_18 0x4E0A62C766 767#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_19 0x4E0A630768 769#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_20 0x4E0A634770 771#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_21 0x4E0A638772 773#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_22 0x4E0A63C774 775#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_23 0x4E0A640776 777#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_24 0x4E0A644778 779#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_25 0x4E0A648780 781#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_26 0x4E0A64C782 783#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_27 0x4E0A650784 785#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_28 0x4E0A654786 787#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_29 0x4E0A658788 789#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_30 0x4E0A65C790 791#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_31 0x4E0A660792 793#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_32 0x4E0A664794 795#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_33 0x4E0A668796 797#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_34 0x4E0A66C798 799#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_35 0x4E0A670800 801#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_36 0x4E0A674802 803#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_37 0x4E0A678804 805#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_38 0x4E0A67C806 807#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_39 0x4E0A680808 809#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_40 0x4E0A684810 811#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_41 0x4E0A688812 813#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_42 0x4E0A68C814 815#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_43 0x4E0A690816 817#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_44 0x4E0A694818 819#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_45 0x4E0A698820 821#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_46 0x4E0A69C822 823#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_47 0x4E0A6A0824 825#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_48 0x4E0A6A4826 827#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_49 0x4E0A6A8828 829#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_50 0x4E0A6AC830 831#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_51 0x4E0A6B0832 833#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_52 0x4E0A6B4834 835#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_53 0x4E0A6B8836 837#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_54 0x4E0A6BC838 839#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_55 0x4E0A6C0840 841#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_56 0x4E0A6C4842 843#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_57 0x4E0A6C8844 845#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_58 0x4E0A6CC846 847#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_59 0x4E0A6D0848 849#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_60 0x4E0A6D4850 851#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_61 0x4E0A6D8852 853#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_62 0x4E0A6DC854 855#define mmROT0_QM_ARB_MST_CHOICE_PUSH_OFST_63 0x4E0A6E0856 857#define mmROT0_QM_ARB_SLV_MASTER_INC_CRED_OFST 0x4E0A704858 859#define mmROT0_QM_ARB_MST_SLAVE_EN 0x4E0A708860 861#define mmROT0_QM_ARB_MST_SLAVE_EN_1 0x4E0A70C862 863#define mmROT0_QM_ARB_SLV_CHOICE_WDT 0x4E0A710864 865#define mmROT0_QM_ARB_SLV_ID 0x4E0A714866 867#define mmROT0_QM_ARB_MST_QUIET_PER 0x4E0A718868 869#define mmROT0_QM_ARB_MSG_MAX_INFLIGHT 0x4E0A744870 871#define mmROT0_QM_ARB_BASE_LO 0x4E0A754872 873#define mmROT0_QM_ARB_BASE_HI 0x4E0A758874 875#define mmROT0_QM_ARB_STATE_STS 0x4E0A780876 877#define mmROT0_QM_ARB_CHOICE_FULLNESS_STS 0x4E0A784878 879#define mmROT0_QM_ARB_MSG_STS 0x4E0A788880 881#define mmROT0_QM_ARB_SLV_CHOICE_Q_HEAD 0x4E0A78C882 883#define mmROT0_QM_ARB_ERR_CAUSE 0x4E0A79C884 885#define mmROT0_QM_ARB_ERR_MSG_EN 0x4E0A7A0886 887#define mmROT0_QM_ARB_ERR_STS_DRP 0x4E0A7A8888 889#define mmROT0_QM_ARB_MST_CRED_STS 0x4E0A7B0890 891#define mmROT0_QM_ARB_MST_CRED_STS_1 0x4E0A7B4892 893#define mmROT0_QM_CSMR_STRICT_PRIO_CFG 0x4E0A7FC894 895#define mmROT0_QM_ARC_CQ_CFG0 0x4E0A800896 897#define mmROT0_QM_ARC_CQ_CFG1 0x4E0A804898 899#define mmROT0_QM_ARC_CQ_PTR_LO 0x4E0A808900 901#define mmROT0_QM_ARC_CQ_PTR_HI 0x4E0A80C902 903#define mmROT0_QM_ARC_CQ_TSIZE 0x4E0A810904 905#define mmROT0_QM_ARC_CQ_CTL 0x4E0A814906 907#define mmROT0_QM_ARC_CQ_IFIFO_STS 0x4E0A81C908 909#define mmROT0_QM_ARC_CQ_STS0 0x4E0A820910 911#define mmROT0_QM_ARC_CQ_STS1 0x4E0A824912 913#define mmROT0_QM_ARC_CQ_TSIZE_STS 0x4E0A828914 915#define mmROT0_QM_ARC_CQ_PTR_LO_STS 0x4E0A82C916 917#define mmROT0_QM_ARC_CQ_PTR_HI_STS 0x4E0A830918 919#define mmROT0_QM_CP_WR_ARC_ADDR_HI 0x4E0A834920 921#define mmROT0_QM_CP_WR_ARC_ADDR_LO 0x4E0A838922 923#define mmROT0_QM_ARC_CQ_IFIFO_MSG_BASE_HI 0x4E0A83C924 925#define mmROT0_QM_ARC_CQ_IFIFO_MSG_BASE_LO 0x4E0A840926 927#define mmROT0_QM_ARC_CQ_CTL_MSG_BASE_HI 0x4E0A844928 929#define mmROT0_QM_ARC_CQ_CTL_MSG_BASE_LO 0x4E0A848930 931#define mmROT0_QM_CQ_IFIFO_MSG_BASE_HI 0x4E0A84C932 933#define mmROT0_QM_CQ_IFIFO_MSG_BASE_LO 0x4E0A850934 935#define mmROT0_QM_CQ_CTL_MSG_BASE_HI 0x4E0A854936 937#define mmROT0_QM_CQ_CTL_MSG_BASE_LO 0x4E0A858938 939#define mmROT0_QM_ADDR_OVRD 0x4E0A85C940 941#define mmROT0_QM_CQ_IFIFO_CI_0 0x4E0A860942 943#define mmROT0_QM_CQ_IFIFO_CI_1 0x4E0A864944 945#define mmROT0_QM_CQ_IFIFO_CI_2 0x4E0A868946 947#define mmROT0_QM_CQ_IFIFO_CI_3 0x4E0A86C948 949#define mmROT0_QM_CQ_IFIFO_CI_4 0x4E0A870950 951#define mmROT0_QM_ARC_CQ_IFIFO_CI 0x4E0A874952 953#define mmROT0_QM_CQ_CTL_CI_0 0x4E0A878954 955#define mmROT0_QM_CQ_CTL_CI_1 0x4E0A87C956 957#define mmROT0_QM_CQ_CTL_CI_2 0x4E0A880958 959#define mmROT0_QM_CQ_CTL_CI_3 0x4E0A884960 961#define mmROT0_QM_CQ_CTL_CI_4 0x4E0A888962 963#define mmROT0_QM_ARC_CQ_CTL_CI 0x4E0A88C964 965#define mmROT0_QM_CP_CFG 0x4E0A890966 967#define mmROT0_QM_CP_EXT_SWITCH 0x4E0A894968 969#define mmROT0_QM_CP_SWITCH_WD_SET 0x4E0A898970 971#define mmROT0_QM_CP_SWITCH_WD 0x4E0A89C972 973#define mmROT0_QM_ARC_LB_ADDR_BASE_LO 0x4E0A8A4974 975#define mmROT0_QM_ARC_LB_ADDR_BASE_HI 0x4E0A8A8976 977#define mmROT0_QM_ENGINE_BASE_ADDR_HI 0x4E0A8AC978 979#define mmROT0_QM_ENGINE_BASE_ADDR_LO 0x4E0A8B0980 981#define mmROT0_QM_ENGINE_ADDR_RANGE_SIZE 0x4E0A8B4982 983#define mmROT0_QM_QM_ARC_AUX_BASE_ADDR_HI 0x4E0A8B8984 985#define mmROT0_QM_QM_ARC_AUX_BASE_ADDR_LO 0x4E0A8BC986 987#define mmROT0_QM_QM_BASE_ADDR_HI 0x4E0A8C0988 989#define mmROT0_QM_QM_BASE_ADDR_LO 0x4E0A8C4990 991#define mmROT0_QM_ARC_PQC_SECURE_PUSH_IND 0x4E0A8C8992 993#define mmROT0_QM_PQC_STS_0_0 0x4E0A8D0994 995#define mmROT0_QM_PQC_STS_0_1 0x4E0A8D4996 997#define mmROT0_QM_PQC_STS_0_2 0x4E0A8D8998 999#define mmROT0_QM_PQC_STS_0_3 0x4E0A8DC1000 1001#define mmROT0_QM_PQC_STS_1_0 0x4E0A8E01002 1003#define mmROT0_QM_PQC_STS_1_1 0x4E0A8E41004 1005#define mmROT0_QM_PQC_STS_1_2 0x4E0A8E81006 1007#define mmROT0_QM_PQC_STS_1_3 0x4E0A8EC1008 1009#define mmROT0_QM_SEI_STATUS 0x4E0A8F01010 1011#define mmROT0_QM_SEI_MASK 0x4E0A8F41012 1013#define mmROT0_QM_GLBL_ERR_ADDR_LO 0x4E0AD001014 1015#define mmROT0_QM_GLBL_ERR_ADDR_HI 0x4E0AD041016 1017#define mmROT0_QM_GLBL_ERR_WDATA 0x4E0AD081018 1019#define mmROT0_QM_L2H_MASK_LO 0x4E0AD141020 1021#define mmROT0_QM_L2H_MASK_HI 0x4E0AD181022 1023#define mmROT0_QM_L2H_CMPR_LO 0x4E0AD1C1024 1025#define mmROT0_QM_L2H_CMPR_HI 0x4E0AD201026 1027#define mmROT0_QM_LOCAL_RANGE_BASE 0x4E0AD241028 1029#define mmROT0_QM_LOCAL_RANGE_SIZE 0x4E0AD281030 1031#define mmROT0_QM_HBW_RD_RATE_LIM_CFG_1 0x4E0AD301032 1033#define mmROT0_QM_LBW_WR_RATE_LIM_CFG_0 0x4E0AD341034 1035#define mmROT0_QM_LBW_WR_RATE_LIM_CFG_1 0x4E0AD381036 1037#define mmROT0_QM_HBW_RD_RATE_LIM_CFG_0 0x4E0AD3C1038 1039#define mmROT0_QM_IND_GW_APB_CFG 0x4E0AD401040 1041#define mmROT0_QM_IND_GW_APB_WDATA 0x4E0AD441042 1043#define mmROT0_QM_IND_GW_APB_RDATA 0x4E0AD481044 1045#define mmROT0_QM_IND_GW_APB_STATUS 0x4E0AD4C1046 1047#define mmROT0_QM_PERF_CNT_FREE_LO 0x4E0AD601048 1049#define mmROT0_QM_PERF_CNT_FREE_HI 0x4E0AD641050 1051#define mmROT0_QM_PERF_CNT_IDLE_LO 0x4E0AD681052 1053#define mmROT0_QM_PERF_CNT_IDLE_HI 0x4E0AD6C1054 1055#define mmROT0_QM_PERF_CNT_CFG 0x4E0AD701056 1057#endif /* ASIC_REG_ROT0_QM_REGS_H_ */1058