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1// SPDX-License-Identifier: GPL-2.02/*3 * Copyright(c) 2018 Intel Corporation. All rights reserved.4 * Intel specific definitions for NVDIMM Firmware Interface Table - NFIT5 */6#ifndef _NFIT_INTEL_H_7#define _NFIT_INTEL_H_8 9#define ND_INTEL_SMART 110 11#define ND_INTEL_SMART_SHUTDOWN_COUNT_VALID     (1 << 5)12#define ND_INTEL_SMART_SHUTDOWN_VALID           (1 << 10)13 14struct nd_intel_smart {15	u32 status;16	union {17		struct {18			u32 flags;19			u8 reserved0[4];20			u8 health;21			u8 spares;22			u8 life_used;23			u8 alarm_flags;24			u16 media_temperature;25			u16 ctrl_temperature;26			u32 shutdown_count;27			u8 ait_status;28			u16 pmic_temperature;29			u8 reserved1[8];30			u8 shutdown_state;31			u32 vendor_size;32			u8 vendor_data[92];33		} __packed;34		u8 data[128];35	};36} __packed;37 38extern const struct nvdimm_security_ops *intel_security_ops;39 40#define ND_INTEL_STATUS_SIZE		441#define ND_INTEL_PASSPHRASE_SIZE	3242 43#define ND_INTEL_STATUS_NOT_SUPPORTED	144#define ND_INTEL_STATUS_RETRY		545#define ND_INTEL_STATUS_NOT_READY	946#define ND_INTEL_STATUS_INVALID_STATE	1047#define ND_INTEL_STATUS_INVALID_PASS	1148#define ND_INTEL_STATUS_OVERWRITE_UNSUPPORTED	0x1000749#define ND_INTEL_STATUS_OQUERY_INPROGRESS	0x1000750#define ND_INTEL_STATUS_OQUERY_SEQUENCE_ERR	0x2000751 52#define ND_INTEL_SEC_STATE_ENABLED	0x0253#define ND_INTEL_SEC_STATE_LOCKED	0x0454#define ND_INTEL_SEC_STATE_FROZEN	0x0855#define ND_INTEL_SEC_STATE_PLIMIT	0x1056#define ND_INTEL_SEC_STATE_UNSUPPORTED	0x2057#define ND_INTEL_SEC_STATE_OVERWRITE	0x4058 59#define ND_INTEL_SEC_ESTATE_ENABLED	0x0160#define ND_INTEL_SEC_ESTATE_PLIMIT	0x0261 62struct nd_intel_get_security_state {63	u32 status;64	u8 extended_state;65	u8 reserved[3];66	u8 state;67	u8 reserved1[3];68} __packed;69 70struct nd_intel_set_passphrase {71	u8 old_pass[ND_INTEL_PASSPHRASE_SIZE];72	u8 new_pass[ND_INTEL_PASSPHRASE_SIZE];73	u32 status;74} __packed;75 76struct nd_intel_unlock_unit {77	u8 passphrase[ND_INTEL_PASSPHRASE_SIZE];78	u32 status;79} __packed;80 81struct nd_intel_disable_passphrase {82	u8 passphrase[ND_INTEL_PASSPHRASE_SIZE];83	u32 status;84} __packed;85 86struct nd_intel_freeze_lock {87	u32 status;88} __packed;89 90struct nd_intel_secure_erase {91	u8 passphrase[ND_INTEL_PASSPHRASE_SIZE];92	u32 status;93} __packed;94 95struct nd_intel_overwrite {96	u8 passphrase[ND_INTEL_PASSPHRASE_SIZE];97	u32 status;98} __packed;99 100struct nd_intel_query_overwrite {101	u32 status;102} __packed;103 104struct nd_intel_set_master_passphrase {105	u8 old_pass[ND_INTEL_PASSPHRASE_SIZE];106	u8 new_pass[ND_INTEL_PASSPHRASE_SIZE];107	u32 status;108} __packed;109 110struct nd_intel_master_secure_erase {111	u8 passphrase[ND_INTEL_PASSPHRASE_SIZE];112	u32 status;113} __packed;114 115#define ND_INTEL_FWA_IDLE 0116#define ND_INTEL_FWA_ARMED 1117#define ND_INTEL_FWA_BUSY 2118 119#define ND_INTEL_DIMM_FWA_NONE 0120#define ND_INTEL_DIMM_FWA_NOTSTAGED 1121#define ND_INTEL_DIMM_FWA_SUCCESS 2122#define ND_INTEL_DIMM_FWA_NEEDRESET 3123#define ND_INTEL_DIMM_FWA_MEDIAFAILED 4124#define ND_INTEL_DIMM_FWA_ABORT 5125#define ND_INTEL_DIMM_FWA_NOTSUPP 6126#define ND_INTEL_DIMM_FWA_ERROR 7127 128struct nd_intel_fw_activate_dimminfo {129	u32 status;130	u16 result;131	u8 state;132	u8 reserved[7];133} __packed;134 135#define ND_INTEL_DIMM_FWA_ARM 1136#define ND_INTEL_DIMM_FWA_DISARM 0137 138struct nd_intel_fw_activate_arm {139	u8 activate_arm;140	u32 status;141} __packed;142 143/* Root device command payloads */144#define ND_INTEL_BUS_FWA_CAP_FWQUIESCE (1 << 0)145#define ND_INTEL_BUS_FWA_CAP_OSQUIESCE (1 << 1)146#define ND_INTEL_BUS_FWA_CAP_RESET     (1 << 2)147 148struct nd_intel_bus_fw_activate_businfo {149	u32 status;150	u16 reserved;151	u8 state;152	u8 capability;153	u64 activate_tmo;154	u64 cpu_quiesce_tmo;155	u64 io_quiesce_tmo;156	u64 max_quiesce_tmo;157} __packed;158 159#define ND_INTEL_BUS_FWA_STATUS_NOARM  (6 | 1 << 16)160#define ND_INTEL_BUS_FWA_STATUS_BUSY   (6 | 2 << 16)161#define ND_INTEL_BUS_FWA_STATUS_NOFW   (6 | 3 << 16)162#define ND_INTEL_BUS_FWA_STATUS_TMO    (6 | 4 << 16)163#define ND_INTEL_BUS_FWA_STATUS_NOIDLE (6 | 5 << 16)164#define ND_INTEL_BUS_FWA_STATUS_ABORT  (6 | 6 << 16)165 166#define ND_INTEL_BUS_FWA_IODEV_FORCE_IDLE (0)167#define ND_INTEL_BUS_FWA_IODEV_OS_IDLE (1)168struct nd_intel_bus_fw_activate {169	u8 iodev_state;170	u32 status;171} __packed;172 173extern const struct nvdimm_fw_ops *intel_fw_ops;174extern const struct nvdimm_bus_fw_ops *intel_bus_fw_ops;175#endif176