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1// SPDX-License-Identifier: GPL-2.0+2/*3 * Copyright (C) 2017 Hisilicon Limited, All Rights Reserved.4 * Author: Zhichang Yuan <yuanzhichang@hisilicon.com>5 * Author: Zou Rongrong <zourongrong@huawei.com>6 * Author: John Garry <john.garry@huawei.com>7 */8 9#include <linux/acpi.h>10#include <linux/console.h>11#include <linux/delay.h>12#include <linux/io.h>13#include <linux/logic_pio.h>14#include <linux/module.h>15#include <linux/of.h>16#include <linux/of_platform.h>17#include <linux/pci.h>18#include <linux/platform_device.h>19#include <linux/serial_8250.h>20#include <linux/slab.h>21 22#define DRV_NAME "hisi-lpc"23 24/*25 * Setting this bit means each IO operation will target a different port26 * address; 0 means repeated IO operations will use the same port,27 * such as BT.28 */29#define FG_INCRADDR_LPC		0x0230 31struct lpc_cycle_para {32	unsigned int opflags;33	unsigned int csize; /* data length of each operation */34};35 36struct hisi_lpc_dev {37	spinlock_t cycle_lock;38	void __iomem  *membase;39	struct logic_pio_hwaddr *io_host;40};41 42/* The max IO cycle counts supported is four per operation at maximum */43#define LPC_MAX_DWIDTH	444 45#define LPC_REG_STARTUP_SIGNAL		0x0046#define LPC_REG_STARTUP_SIGNAL_START	BIT(0)47#define LPC_REG_OP_STATUS		0x0448#define LPC_REG_OP_STATUS_IDLE		BIT(0)49#define LPC_REG_OP_STATUS_FINISHED	BIT(1)50#define LPC_REG_OP_LEN			0x10 /* LPC cycles count per start */51#define LPC_REG_CMD			0x1452#define LPC_REG_CMD_OP			BIT(0) /* 0: read, 1: write */53#define LPC_REG_CMD_SAMEADDR		BIT(3)54#define LPC_REG_ADDR			0x20 /* target address */55#define LPC_REG_WDATA			0x24 /* write FIFO */56#define LPC_REG_RDATA			0x28 /* read FIFO */57 58/* The minimal nanosecond interval for each query on LPC cycle status */59#define LPC_NSEC_PERWAIT	10060 61/*62 * The maximum waiting time is about 128us.  It is specific for stream I/O,63 * such as ins.64 *65 * The fastest IO cycle time is about 390ns, but the worst case will wait66 * for extra 256 lpc clocks, so (256 + 13) * 30ns = 8 us. The maximum burst67 * cycles is 16. So, the maximum waiting time is about 128us under worst68 * case.69 *70 * Choose 1300 as the maximum.71 */72#define LPC_MAX_WAITCNT		130073 74/* About 10us. This is specific for single IO operations, such as inb */75#define LPC_PEROP_WAITCNT	10076 77static int wait_lpc_idle(void __iomem *mbase, unsigned int waitcnt)78{79	u32 status;80 81	do {82		status = readl(mbase + LPC_REG_OP_STATUS);83		if (status & LPC_REG_OP_STATUS_IDLE)84			return (status & LPC_REG_OP_STATUS_FINISHED) ? 0 : -EIO;85		ndelay(LPC_NSEC_PERWAIT);86	} while (--waitcnt);87 88	return -ETIMEDOUT;89}90 91/*92 * hisi_lpc_target_in - trigger a series of LPC cycles for read operation93 * @lpcdev: pointer to hisi lpc device94 * @para: some parameters used to control the lpc I/O operations95 * @addr: the lpc I/O target port address96 * @buf: where the read back data is stored97 * @opcnt: how many I/O operations required, i.e. data width98 *99 * Returns 0 on success, non-zero on fail.100 */101static int hisi_lpc_target_in(struct hisi_lpc_dev *lpcdev,102			      struct lpc_cycle_para *para, unsigned long addr,103			      unsigned char *buf, unsigned long opcnt)104{105	unsigned int cmd_word;106	unsigned int waitcnt;107	unsigned long flags;108	int ret;109 110	if (!buf || !opcnt || !para || !para->csize || !lpcdev)111		return -EINVAL;112 113	cmd_word = 0; /* IO mode, Read */114	waitcnt = LPC_PEROP_WAITCNT;115	if (!(para->opflags & FG_INCRADDR_LPC)) {116		cmd_word |= LPC_REG_CMD_SAMEADDR;117		waitcnt = LPC_MAX_WAITCNT;118	}119 120	/* whole operation must be atomic */121	spin_lock_irqsave(&lpcdev->cycle_lock, flags);122 123	writel_relaxed(opcnt, lpcdev->membase + LPC_REG_OP_LEN);124	writel_relaxed(cmd_word, lpcdev->membase + LPC_REG_CMD);125	writel_relaxed(addr, lpcdev->membase + LPC_REG_ADDR);126 127	writel(LPC_REG_STARTUP_SIGNAL_START,128	       lpcdev->membase + LPC_REG_STARTUP_SIGNAL);129 130	/* whether the operation is finished */131	ret = wait_lpc_idle(lpcdev->membase, waitcnt);132	if (ret) {133		spin_unlock_irqrestore(&lpcdev->cycle_lock, flags);134		return ret;135	}136 137	readsb(lpcdev->membase + LPC_REG_RDATA, buf, opcnt);138 139	spin_unlock_irqrestore(&lpcdev->cycle_lock, flags);140 141	return 0;142}143 144/*145 * hisi_lpc_target_out - trigger a series of LPC cycles for write operation146 * @lpcdev: pointer to hisi lpc device147 * @para: some parameters used to control the lpc I/O operations148 * @addr: the lpc I/O target port address149 * @buf: where the data to be written is stored150 * @opcnt: how many I/O operations required, i.e. data width151 *152 * Returns 0 on success, non-zero on fail.153 */154static int hisi_lpc_target_out(struct hisi_lpc_dev *lpcdev,155			       struct lpc_cycle_para *para, unsigned long addr,156			       const unsigned char *buf, unsigned long opcnt)157{158	unsigned int waitcnt;159	unsigned long flags;160	u32 cmd_word;161	int ret;162 163	if (!buf || !opcnt || !para || !lpcdev)164		return -EINVAL;165 166	/* default is increasing address */167	cmd_word = LPC_REG_CMD_OP; /* IO mode, write */168	waitcnt = LPC_PEROP_WAITCNT;169	if (!(para->opflags & FG_INCRADDR_LPC)) {170		cmd_word |= LPC_REG_CMD_SAMEADDR;171		waitcnt = LPC_MAX_WAITCNT;172	}173 174	spin_lock_irqsave(&lpcdev->cycle_lock, flags);175 176	writel_relaxed(opcnt, lpcdev->membase + LPC_REG_OP_LEN);177	writel_relaxed(cmd_word, lpcdev->membase + LPC_REG_CMD);178	writel_relaxed(addr, lpcdev->membase + LPC_REG_ADDR);179 180	writesb(lpcdev->membase + LPC_REG_WDATA, buf, opcnt);181 182	writel(LPC_REG_STARTUP_SIGNAL_START,183	       lpcdev->membase + LPC_REG_STARTUP_SIGNAL);184 185	/* whether the operation is finished */186	ret = wait_lpc_idle(lpcdev->membase, waitcnt);187 188	spin_unlock_irqrestore(&lpcdev->cycle_lock, flags);189 190	return ret;191}192 193static unsigned long hisi_lpc_pio_to_addr(struct hisi_lpc_dev *lpcdev,194					  unsigned long pio)195{196	return pio - lpcdev->io_host->io_start + lpcdev->io_host->hw_start;197}198 199/*200 * hisi_lpc_comm_in - input the data in a single operation201 * @hostdata: pointer to the device information relevant to LPC controller202 * @pio: the target I/O port address203 * @dwidth: the data length required to read from the target I/O port204 *205 * When success, data is returned. Otherwise, ~0 is returned.206 */207static u32 hisi_lpc_comm_in(void *hostdata, unsigned long pio, size_t dwidth)208{209	struct hisi_lpc_dev *lpcdev = hostdata;210	struct lpc_cycle_para iopara;211	unsigned long addr;212	__le32 rd_data = 0;213	int ret;214 215	if (!lpcdev || !dwidth || dwidth > LPC_MAX_DWIDTH)216		return ~0;217 218	addr = hisi_lpc_pio_to_addr(lpcdev, pio);219 220	iopara.opflags = FG_INCRADDR_LPC;221	iopara.csize = dwidth;222 223	ret = hisi_lpc_target_in(lpcdev, &iopara, addr,224				 (unsigned char *)&rd_data, dwidth);225	if (ret)226		return ~0;227 228	return le32_to_cpu(rd_data);229}230 231/*232 * hisi_lpc_comm_out - output the data in a single operation233 * @hostdata: pointer to the device information relevant to LPC controller234 * @pio: the target I/O port address235 * @val: a value to be output from caller, maximum is four bytes236 * @dwidth: the data width required writing to the target I/O port237 *238 * This function corresponds to out(b,w,l) only.239 */240static void hisi_lpc_comm_out(void *hostdata, unsigned long pio,241			      u32 val, size_t dwidth)242{243	struct hisi_lpc_dev *lpcdev = hostdata;244	struct lpc_cycle_para iopara;245	const unsigned char *buf;246	unsigned long addr;247	__le32 _val = cpu_to_le32(val);248 249	if (!lpcdev || !dwidth || dwidth > LPC_MAX_DWIDTH)250		return;251 252	buf = (const unsigned char *)&_val;253	addr = hisi_lpc_pio_to_addr(lpcdev, pio);254 255	iopara.opflags = FG_INCRADDR_LPC;256	iopara.csize = dwidth;257 258	hisi_lpc_target_out(lpcdev, &iopara, addr, buf, dwidth);259}260 261/*262 * hisi_lpc_comm_ins - input the data in the buffer in multiple operations263 * @hostdata: pointer to the device information relevant to LPC controller264 * @pio: the target I/O port address265 * @buffer: a buffer where read/input data bytes are stored266 * @dwidth: the data width required writing to the target I/O port267 * @count: how many data units whose length is dwidth will be read268 *269 * When success, the data read back is stored in buffer pointed by buffer.270 * Returns 0 on success, -errno otherwise.271 */272static u32 hisi_lpc_comm_ins(void *hostdata, unsigned long pio, void *buffer,273			     size_t dwidth, unsigned int count)274{275	struct hisi_lpc_dev *lpcdev = hostdata;276	unsigned char *buf = buffer;277	struct lpc_cycle_para iopara;278	unsigned long addr;279 280	if (!lpcdev || !buf || !count || !dwidth || dwidth > LPC_MAX_DWIDTH)281		return -EINVAL;282 283	iopara.opflags = 0;284	if (dwidth > 1)285		iopara.opflags |= FG_INCRADDR_LPC;286	iopara.csize = dwidth;287 288	addr = hisi_lpc_pio_to_addr(lpcdev, pio);289 290	do {291		int ret;292 293		ret = hisi_lpc_target_in(lpcdev, &iopara, addr, buf, dwidth);294		if (ret)295			return ret;296		buf += dwidth;297	} while (--count);298 299	return 0;300}301 302/*303 * hisi_lpc_comm_outs - output the data in the buffer in multiple operations304 * @hostdata: pointer to the device information relevant to LPC controller305 * @pio: the target I/O port address306 * @buffer: a buffer where write/output data bytes are stored307 * @dwidth: the data width required writing to the target I/O port308 * @count: how many data units whose length is dwidth will be written309 */310static void hisi_lpc_comm_outs(void *hostdata, unsigned long pio,311			       const void *buffer, size_t dwidth,312			       unsigned int count)313{314	struct hisi_lpc_dev *lpcdev = hostdata;315	struct lpc_cycle_para iopara;316	const unsigned char *buf = buffer;317	unsigned long addr;318 319	if (!lpcdev || !buf || !count || !dwidth || dwidth > LPC_MAX_DWIDTH)320		return;321 322	iopara.opflags = 0;323	if (dwidth > 1)324		iopara.opflags |= FG_INCRADDR_LPC;325	iopara.csize = dwidth;326 327	addr = hisi_lpc_pio_to_addr(lpcdev, pio);328	do {329		if (hisi_lpc_target_out(lpcdev, &iopara, addr, buf, dwidth))330			break;331		buf += dwidth;332	} while (--count);333}334 335static const struct logic_pio_host_ops hisi_lpc_ops = {336	.in = hisi_lpc_comm_in,337	.out = hisi_lpc_comm_out,338	.ins = hisi_lpc_comm_ins,339	.outs = hisi_lpc_comm_outs,340};341 342#ifdef CONFIG_ACPI343static int hisi_lpc_acpi_xlat_io_res(struct acpi_device *adev,344				     struct acpi_device *host,345				     struct resource *res)346{347	unsigned long sys_port;348	resource_size_t len = resource_size(res);349 350	sys_port = logic_pio_trans_hwaddr(acpi_fwnode_handle(host), res->start, len);351	if (sys_port == ~0UL)352		return -EFAULT;353 354	res->start = sys_port;355	res->end = sys_port + len;356 357	return 0;358}359 360/*361 * Released firmware describes the IO port max address as 0x3fff, which is362 * the max host bus address. Fixup to a proper range. This will probably363 * never be fixed in firmware.364 */365static void hisi_lpc_acpi_fixup_child_resource(struct device *hostdev,366					       struct resource *r)367{368	if (r->end != 0x3fff)369		return;370 371	if (r->start == 0xe4)372		r->end = 0xe4 + 0x04 - 1;373	else if (r->start == 0x2f8)374		r->end = 0x2f8 + 0x08 - 1;375	else376		dev_warn(hostdev, "unrecognised resource %pR to fixup, ignoring\n",377			 r);378}379 380/*381 * hisi_lpc_acpi_set_io_res - set the resources for a child382 * @adev: ACPI companion of the device node to be updated the I/O resource383 * @hostdev: the device node associated with host controller384 * @res: double pointer to be set to the address of translated resources385 * @num_res: pointer to variable to hold the number of translated resources386 *387 * Returns 0 when successful, and a negative value for failure.388 *389 * For a given host controller, each child device will have an associated390 * host-relative address resource.  This function will return the translated391 * logical PIO addresses for each child devices resources.392 */393static int hisi_lpc_acpi_set_io_res(struct acpi_device *adev,394				    struct device *hostdev,395				    const struct resource **res, int *num_res)396{397	struct acpi_device *host = to_acpi_device(adev->dev.parent);398	struct resource_entry *rentry;399	LIST_HEAD(resource_list);400	struct resource *resources;401	int count;402	int i;403 404	if (!adev->status.present) {405		dev_dbg(&adev->dev, "device is not present\n");406		return -EIO;407	}408 409	if (acpi_device_enumerated(adev)) {410		dev_dbg(&adev->dev, "has been enumerated\n");411		return -EIO;412	}413 414	/*415	 * The following code segment to retrieve the resources is common to416	 * acpi_create_platform_device(), so consider a common helper function417	 * in future.418	 */419	count = acpi_dev_get_resources(adev, &resource_list, NULL, NULL);420	if (count <= 0) {421		dev_dbg(&adev->dev, "failed to get resources\n");422		return count ? count : -EIO;423	}424 425	resources = devm_kcalloc(hostdev, count, sizeof(*resources),426				 GFP_KERNEL);427	if (!resources) {428		dev_warn(hostdev, "could not allocate memory for %d resources\n",429			 count);430		acpi_dev_free_resource_list(&resource_list);431		return -ENOMEM;432	}433	count = 0;434	list_for_each_entry(rentry, &resource_list, node) {435		resources[count] = *rentry->res;436		hisi_lpc_acpi_fixup_child_resource(hostdev, &resources[count]);437		count++;438	}439 440	acpi_dev_free_resource_list(&resource_list);441 442	/* translate the I/O resources */443	for (i = 0; i < count; i++) {444		int ret;445 446		if (!(resources[i].flags & IORESOURCE_IO))447			continue;448		ret = hisi_lpc_acpi_xlat_io_res(adev, host, &resources[i]);449		if (ret) {450			dev_err(&adev->dev, "translate IO range %pR failed (%d)\n",451				&resources[i], ret);452			return ret;453		}454	}455	*res = resources;456	*num_res = count;457 458	return 0;459}460 461static int hisi_lpc_acpi_remove_subdev(struct device *dev, void *unused)462{463	platform_device_unregister(to_platform_device(dev));464	return 0;465}466 467static int hisi_lpc_acpi_clear_enumerated(struct acpi_device *adev, void *not_used)468{469	acpi_device_clear_enumerated(adev);470	return 0;471}472 473struct hisi_lpc_acpi_cell {474	const char *hid;475	const struct platform_device_info *pdevinfo;476};477 478static void hisi_lpc_acpi_remove(struct device *hostdev)479{480	device_for_each_child(hostdev, NULL, hisi_lpc_acpi_remove_subdev);481	acpi_dev_for_each_child(ACPI_COMPANION(hostdev),482				hisi_lpc_acpi_clear_enumerated, NULL);483}484 485static int hisi_lpc_acpi_add_child(struct acpi_device *child, void *data)486{487	const char *hid = acpi_device_hid(child);488	struct device *hostdev = data;489	const struct hisi_lpc_acpi_cell *cell;490	struct platform_device *pdev;491	const struct resource *res;492	bool found = false;493	int num_res;494	int ret;495 496	ret = hisi_lpc_acpi_set_io_res(child, hostdev, &res, &num_res);497	if (ret) {498		dev_warn(hostdev, "set resource fail (%d)\n", ret);499		return ret;500	}501 502	cell = (struct hisi_lpc_acpi_cell []){503		/* ipmi */504		{505			.hid = "IPI0001",506			.pdevinfo = (struct platform_device_info []) {507				{508					.parent = hostdev,509					.fwnode = acpi_fwnode_handle(child),510					.name = "hisi-lpc-ipmi",511					.id = PLATFORM_DEVID_AUTO,512					.res = res,513					.num_res = num_res,514				},515			},516		},517		/* 8250-compatible uart */518		{519			.hid = "HISI1031",520			.pdevinfo = (struct platform_device_info []) {521				{522					.parent = hostdev,523					.fwnode = acpi_fwnode_handle(child),524					.name = "serial8250",525					.id = PLATFORM_DEVID_AUTO,526					.res = res,527					.num_res = num_res,528					.data = (struct plat_serial8250_port []) {529						{530							.iobase = res->start,531							.uartclk = 1843200,532							.iotype = UPIO_PORT,533							.flags = UPF_BOOT_AUTOCONF,534						},535						{}536					},537					.size_data =  2 * sizeof(struct plat_serial8250_port),538				},539			},540		},541		{}542	};543 544	for (; cell && cell->hid; cell++) {545		if (!strcmp(cell->hid, hid)) {546			found = true;547			break;548		}549	}550 551	if (!found) {552		dev_warn(hostdev,553			 "could not find cell for child device (%s), discarding\n",554			 hid);555		return 0;556	}557 558	pdev = platform_device_register_full(cell->pdevinfo);559	if (IS_ERR(pdev))560		return PTR_ERR(pdev);561 562	acpi_device_set_enumerated(child);563	return 0;564}565 566/*567 * hisi_lpc_acpi_probe - probe children for ACPI FW568 * @hostdev: LPC host device pointer569 *570 * Returns 0 when successful, and a negative value for failure.571 *572 * Create a platform device per child, fixing up the resources573 * from bus addresses to Logical PIO addresses.574 *575 */576static int hisi_lpc_acpi_probe(struct device *hostdev)577{578	int ret;579 580	/* Only consider the children of the host */581	ret = acpi_dev_for_each_child(ACPI_COMPANION(hostdev),582				      hisi_lpc_acpi_add_child, hostdev);583	if (ret)584		hisi_lpc_acpi_remove(hostdev);585 586	return ret;587}588#else589static int hisi_lpc_acpi_probe(struct device *dev)590{591	return -ENODEV;592}593 594static void hisi_lpc_acpi_remove(struct device *hostdev)595{596}597#endif // CONFIG_ACPI598 599/*600 * hisi_lpc_probe - the probe callback function for hisi lpc host,601 *		   will finish all the initialization.602 * @pdev: the platform device corresponding to hisi lpc host603 *604 * Returns 0 on success, non-zero on fail.605 */606static int hisi_lpc_probe(struct platform_device *pdev)607{608	struct device *dev = &pdev->dev;609	struct logic_pio_hwaddr *range;610	struct hisi_lpc_dev *lpcdev;611	resource_size_t io_end;612	int ret;613 614	lpcdev = devm_kzalloc(dev, sizeof(*lpcdev), GFP_KERNEL);615	if (!lpcdev)616		return -ENOMEM;617 618	spin_lock_init(&lpcdev->cycle_lock);619 620	lpcdev->membase = devm_platform_ioremap_resource(pdev, 0);621	if (IS_ERR(lpcdev->membase))622		return PTR_ERR(lpcdev->membase);623 624	range = devm_kzalloc(dev, sizeof(*range), GFP_KERNEL);625	if (!range)626		return -ENOMEM;627 628	range->fwnode = dev_fwnode(dev);629	range->flags = LOGIC_PIO_INDIRECT;630	range->size = PIO_INDIRECT_SIZE;631	range->hostdata = lpcdev;632	range->ops = &hisi_lpc_ops;633	lpcdev->io_host = range;634 635	ret = logic_pio_register_range(range);636	if (ret) {637		dev_err(dev, "register IO range failed (%d)!\n", ret);638		return ret;639	}640 641	/* register the LPC host PIO resources */642	if (is_acpi_device_node(range->fwnode))643		ret = hisi_lpc_acpi_probe(dev);644	else645		ret = of_platform_populate(dev->of_node, NULL, NULL, dev);646	if (ret) {647		logic_pio_unregister_range(range);648		return ret;649	}650 651	dev_set_drvdata(dev, lpcdev);652 653	io_end = lpcdev->io_host->io_start + lpcdev->io_host->size;654	dev_info(dev, "registered range [%pa - %pa]\n",655		 &lpcdev->io_host->io_start, &io_end);656 657	return ret;658}659 660static void hisi_lpc_remove(struct platform_device *pdev)661{662	struct device *dev = &pdev->dev;663	struct hisi_lpc_dev *lpcdev = dev_get_drvdata(dev);664	struct logic_pio_hwaddr *range = lpcdev->io_host;665 666	if (is_acpi_device_node(range->fwnode))667		hisi_lpc_acpi_remove(dev);668	else669		of_platform_depopulate(dev);670 671	logic_pio_unregister_range(range);672}673 674static const struct of_device_id hisi_lpc_of_match[] = {675	{ .compatible = "hisilicon,hip06-lpc", },676	{ .compatible = "hisilicon,hip07-lpc", },677	{}678};679 680static const struct acpi_device_id hisi_lpc_acpi_match[] = {681	{"HISI0191"},682	{}683};684 685static struct platform_driver hisi_lpc_driver = {686	.driver = {687		.name           = DRV_NAME,688		.of_match_table = hisi_lpc_of_match,689		.acpi_match_table = hisi_lpc_acpi_match,690	},691	.probe = hisi_lpc_probe,692	.remove_new = hisi_lpc_remove,693};694builtin_platform_driver(hisi_lpc_driver);695